CRACEN CryptoMaster DMA layer.

Helper layer that provides common functionality for the CRACEN Cryptmaster DMA. More...

Macros
#define	NRF_CRACEN_CM_DMA_DESC_STOP   ((struct nrf_cracen_cm_dma_desc *)0x1)
	This value can be used as a DMA descriptor next address to indicate there is no next descriptor, and therefore the DMA should stop with current one.
#define	NRF_CRACEN_CM_DMA_DESC_LENGTH_REALIGN   (1UL << 29)
	When this value is OR'ed with a descriptor length field, the DMA will read from/write into the FIFO extra dummy bytes so the operation will finish at a FIFO word boundary.
#define	NRF_CRACEN_CM_DMA_TAG_CONFIG   0x10UL
	When this value is OR'ed into the DMA tag, the data will be routed to the selected crypto engine configuration interface, otherwise the data is routed to its data interface.
#define	NRF_CRACEN_CM_DMA_TAG_LAST   0x20UL
	This can value can be OR'ed into the DMA tag. It will be passed as the "last" side signal to the selected crypto engine with the data block. It is up to each crypto engine how to interpret it.
#define	NRF_CRACEN_CM_DMA_TAG_DATATYPE_OFFSET   6
	Offset of the DataType field in data tags.
#define	NRF_CRACEN_CM_DMA_TAG_AES_CONFIG(reg_off)
	Generate a tag targeting a configuration register in the the AES crypto engine.
#define	NRF_CRACEN_CM_AES_CONFIG(mode_of_operation, key_sel, context_save, context_load, decrypt)
	Generate the value to be written in the AES crypto engine configuration register given its parameters.

Enumerations
enum	nrf_cracen_cm_dma_tag_engine_t {   NRF_CRACEN_CM_DMA_TAG_ENGINE_AES = 0x1 ,   NRF_CRACEN_CM_DMA_TAG_ENGINE_HASH = 0x3 ,   NRF_CRACEN_CM_DMA_TAG_ENGINE_BYPASS = 0xF }
	CRACEN CM DMA tag engine selection values. More...
enum	nrf_cracen_cm_dma_tag_datatype_t {   NRF_CRACEN_CM_DMA_TAG_DATATYPE_AES_PAYLOAD = (0 << 6 ) ,   NRF_CRACEN_CM_DMA_TAG_DATATYPE_AES_HEADER = (1 << 6 ) ,   NRF_CRACEN_CM_DMA_TAG_DATATYPE_HASH_MESSAGE = (0 << 6 ) ,   NRF_CRACEN_CM_DMA_TAG_DATATYPE_HASH_INIT_DATA = (1 << 6 ) ,   NRF_CRACEN_CM_DMA_TAG_DATATYPE_HASH_HMAC_KEY = (2 << 6 ) ,   NRF_CRACEN_CM_DMA_TAG_DATATYPE_HASH_HMAC_REF_HASH = (3 << 6 ) }
	CRACEN CM DMA tag data type selection values. More...
enum	nrf_cracen_cm_aes_reg_offset_t {   NRF_CRACEN_CM_AES_REG_OFFSET_CONFIG = 0x0 ,   NRF_CRACEN_CM_AES_REG_OFFSET_KEY = 0x8 ,   NRF_CRACEN_CM_AES_REG_OFFSET_IV = 0x28 ,   NRF_CRACEN_CM_AES_REG_OFFSET_IV2 = 0x38 ,   NRF_CRACEN_CM_AES_REG_OFFSET_KEY2 = 0x48 ,   NRF_CRACEN_CM_AES_REG_OFFSET_MASK = 0x68 }
	CRACEN CM AES crypto engine configuration interface registers offsets. More...
enum	nrf_cracen_cm_aes_config_mode_t {   NRF_CRACEN_CM_AES_CONFIG_MODE_ECB = 0x001 ,   NRF_CRACEN_CM_AES_CONFIG_MODE_CBC = 0x002 ,   NRF_CRACEN_CM_AES_CONFIG_MODE_CTR = 0x004 ,   NRF_CRACEN_CM_AES_CONFIG_MODE_CFB = 0x008 ,   NRF_CRACEN_CM_AES_CONFIG_MODE_OFB = 0x010 ,   NRF_CRACEN_CM_AES_CONFIG_MODE_CCM = 0x020 ,   NRF_CRACEN_CM_AES_CONFIG_MODE_GMC_GMAC = 0x040 ,   NRF_CRACEN_CM_AES_CONFIG_MODE_XTS = 0x080 ,   NRF_CRACEN_CM_AES_CONFIG_MODE_CMAC = 0x100 }
	CRACEN CM AES crypto engine configuration modes of operation. More...
enum	nrf_cracen_cm_aes_config_key_t {   NRF_CRACEN_CM_AES_CONFIG_KEY_SW_PROGRAMMED = 0x0 ,   NRF_CRACEN_CM_AES_CONFIG_KEY_AESKEY = 0x1 }
	CRACEN CM AES crypto engine configuration key selection. More...

Functions
struct	__ALIGN (4) nrf_cracen_cm_dma_desc
	CRACEN CryptoMaster DMA descriptor.

Variables
	nrf_cracen_cm_dma_desc_t

Detailed Description

Helper layer that provides common functionality for the CRACEN Cryptmaster DMA.

Macro Definition Documentation

NRF_CRACEN_CM_AES_CONFIG

#define NRF_CRACEN_CM_AES_CONFIG	(		mode_of_operation,
			key_sel,
			context_save,
			context_load,
			decrypt )

Value:

    (  (((key_sel >> 2) & 0x7) << 28)     \
     | ((mode_of_operation & 0x1FF) << 8) \
     | ((key_sel & 0x3) << 6)             \
     | ((context_save ? 1 : 0) << 5 )     \
     | ((context_load ? 1 : 0) << 4 )     \
     | (decrypt ? 1 : 0)                  \
    )

Generate the value to be written in the AES crypto engine configuration register given its parameters.

Parameters

[in]	mode_of_operation	AES mode of operation, one of nrf_cracen_cm_aes_config_mode_t.
[in]	key_sel	SW or HW key selection, one of nrf_cracen_cm_aes_config_key_t.
[in]	context_save	True if operation in AES mode is not final and the engine will return the context.
[in]	context_load	True if operation in AES mode is not initial and the context is provided as input.
[in]	decrypt	True if decryption is to be executed, false if encryption.

Note

This configuration register can only be written using the cryptomaster DMA engine.

NRF_CRACEN_CM_DMA_TAG_AES_CONFIG

#define NRF_CRACEN_CM_DMA_TAG_AES_CONFIG

(

reg_off

)

Value:

    (NRF_CRACEN_CM_DMA_TAG_ENGINE_AES | NRF_CRACEN_CM_DMA_TAG_CONFIG | (reg_off << 8))

Generate a tag targeting a configuration register in the the AES crypto engine.

Parameters

[in]

reg_off

Register offset, one of nrf_cracen_cm_aes_reg_offset_t.

Enumeration Type Documentation

nrf_cracen_cm_aes_config_key_t

enum nrf_cracen_cm_aes_config_key_t

CRACEN CM AES crypto engine configuration key selection.

Enumerator
NRF_CRACEN_CM_AES_CONFIG_KEY_SW_PROGRAMMED	Use key programmed by CPU (normal mode).
NRF_CRACEN_CM_AES_CONFIG_KEY_AESKEY	Use special HW input key AESKey[255:0].

nrf_cracen_cm_aes_config_mode_t

enum nrf_cracen_cm_aes_config_mode_t

CRACEN CM AES crypto engine configuration modes of operation.

Enumerator
NRF_CRACEN_CM_AES_CONFIG_MODE_ECB	ECB mode.
NRF_CRACEN_CM_AES_CONFIG_MODE_CBC	CBC mode.
NRF_CRACEN_CM_AES_CONFIG_MODE_CTR	CTR mode.
NRF_CRACEN_CM_AES_CONFIG_MODE_CFB	CFB mode.
NRF_CRACEN_CM_AES_CONFIG_MODE_OFB	OFB mode.
NRF_CRACEN_CM_AES_CONFIG_MODE_CCM	CCM mode.
NRF_CRACEN_CM_AES_CONFIG_MODE_GMC_GMAC	GMC/GMAC mode.
NRF_CRACEN_CM_AES_CONFIG_MODE_XTS	XTS mode.
NRF_CRACEN_CM_AES_CONFIG_MODE_CMAC	CMAC mode.

nrf_cracen_cm_aes_reg_offset_t

enum nrf_cracen_cm_aes_reg_offset_t

CRACEN CM AES crypto engine configuration interface registers offsets.

Enumerator
NRF_CRACEN_CM_AES_REG_OFFSET_CONFIG	Config register.
NRF_CRACEN_CM_AES_REG_OFFSET_KEY	AES key (up to 32 bytes).
NRF_CRACEN_CM_AES_REG_OFFSET_IV	AES initialization vector (16 bytes).
NRF_CRACEN_CM_AES_REG_OFFSET_IV2	AES initialization vector, used for context switching (16 bytes).
NRF_CRACEN_CM_AES_REG_OFFSET_KEY2	AES tweak key (for XTS only) (up to 32 bytes).
NRF_CRACEN_CM_AES_REG_OFFSET_MASK	Initial value for LFSR (used for countermeasure).

nrf_cracen_cm_dma_tag_datatype_t

enum nrf_cracen_cm_dma_tag_datatype_t

CRACEN CM DMA tag data type selection values.

Enumerator
NRF_CRACEN_CM_DMA_TAG_DATATYPE_AES_PAYLOAD	(for AES engine) Payload (encrypted).
NRF_CRACEN_CM_DMA_TAG_DATATYPE_AES_HEADER	(for AES engine) Header (not encrypted, but authenticated).
NRF_CRACEN_CM_DMA_TAG_DATATYPE_HASH_MESSAGE	(for Hash engine) Message.
NRF_CRACEN_CM_DMA_TAG_DATATYPE_HASH_INIT_DATA	(for Hash engine) Initialization data.
NRF_CRACEN_CM_DMA_TAG_DATATYPE_HASH_HMAC_KEY	(for Hash engine) HMAC Key.
NRF_CRACEN_CM_DMA_TAG_DATATYPE_HASH_HMAC_REF_HASH	(for Hash engine) Reference hash.

nrf_cracen_cm_dma_tag_engine_t

enum nrf_cracen_cm_dma_tag_engine_t

CRACEN CM DMA tag engine selection values.

Enumerator
NRF_CRACEN_CM_DMA_TAG_ENGINE_AES	Select the AES engine.
NRF_CRACEN_CM_DMA_TAG_ENGINE_HASH	Select the Hash engine.
NRF_CRACEN_CM_DMA_TAG_ENGINE_BYPASS	Select the engine bypass.

Function Documentation

__ALIGN()

struct __ALIGN

(

4

)

CRACEN CryptoMaster DMA descriptor.

< Address of the data block.

< Pointer to a possibly chained descriptor.

< Number of bytes in the data block.

< User tag (only used for fetch).