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nrfx 4.5.0
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Hardware access layer for managing the Memory Watch Unit (MWU) peripheral. More...
Enumerations | |
| enum | nrf_mwu_event_t { NRF_MWU_EVENT_REGION0_WRITE = offsetof(NRF_MWU_Type, EVENTS_REGION[0].WA) , NRF_MWU_EVENT_REGION0_READ = offsetof(NRF_MWU_Type, EVENTS_REGION[0].RA) , NRF_MWU_EVENT_REGION1_WRITE = offsetof(NRF_MWU_Type, EVENTS_REGION[1].WA) , NRF_MWU_EVENT_REGION1_READ = offsetof(NRF_MWU_Type, EVENTS_REGION[1].RA) , NRF_MWU_EVENT_REGION2_WRITE = offsetof(NRF_MWU_Type, EVENTS_REGION[2].WA) , NRF_MWU_EVENT_REGION2_READ = offsetof(NRF_MWU_Type, EVENTS_REGION[2].RA) , NRF_MWU_EVENT_REGION3_WRITE = offsetof(NRF_MWU_Type, EVENTS_REGION[3].WA) , NRF_MWU_EVENT_REGION3_READ = offsetof(NRF_MWU_Type, EVENTS_REGION[3].RA) , NRF_MWU_EVENT_PREGION0_WRITE = offsetof(NRF_MWU_Type, EVENTS_PREGION[0].WA) , NRF_MWU_EVENT_PREGION0_READ = offsetof(NRF_MWU_Type, EVENTS_PREGION[0].RA) , NRF_MWU_EVENT_PREGION1_WRITE = offsetof(NRF_MWU_Type, EVENTS_PREGION[1].WA) , NRF_MWU_EVENT_PREGION1_READ = offsetof(NRF_MWU_Type, EVENTS_PREGION[1].RA) } |
| MWU events. More... | |
| enum | nrf_mwu_int_mask_t { NRF_MWU_INT_REGION0_WRITE_MASK = MWU_INTEN_REGION0WA_Msk , NRF_MWU_INT_REGION0_READ_MASK = MWU_INTEN_REGION0RA_Msk , NRF_MWU_INT_REGION1_WRITE_MASK = MWU_INTEN_REGION1WA_Msk , NRF_MWU_INT_REGION1_READ_MASK = MWU_INTEN_REGION1RA_Msk , NRF_MWU_INT_REGION2_WRITE_MASK = MWU_INTEN_REGION2WA_Msk , NRF_MWU_INT_REGION2_READ_MASK = MWU_INTEN_REGION2RA_Msk , NRF_MWU_INT_REGION3_WRITE_MASK = MWU_INTEN_REGION3WA_Msk , NRF_MWU_INT_REGION3_READ_MASK = MWU_INTEN_REGION3RA_Msk , NRF_MWU_INT_PREGION0_WRITE_MASK = MWU_INTEN_PREGION0WA_Msk , NRF_MWU_INT_PREGION0_READ_MASK = MWU_INTEN_PREGION0RA_Msk , NRF_MWU_INT_PREGION1_WRITE_MASK = MWU_INTEN_PREGION1WA_Msk , NRF_MWU_INT_PREGION1_READ_MASK = MWU_INTEN_PREGION1RA_Msk } |
| MWU interrupt masks. More... | |
| enum | nrf_mwu_region_watch_t { NRF_MWU_WATCH_REGION0_WRITE = MWU_REGIONEN_RGN0WA_Msk , NRF_MWU_WATCH_REGION0_READ = MWU_REGIONEN_RGN0RA_Msk , NRF_MWU_WATCH_REGION1_WRITE = MWU_REGIONEN_RGN1WA_Msk , NRF_MWU_WATCH_REGION1_READ = MWU_REGIONEN_RGN1RA_Msk , NRF_MWU_WATCH_REGION2_WRITE = MWU_REGIONEN_RGN2WA_Msk , NRF_MWU_WATCH_REGION2_READ = MWU_REGIONEN_RGN2RA_Msk , NRF_MWU_WATCH_REGION3_WRITE = MWU_REGIONEN_RGN3WA_Msk , NRF_MWU_WATCH_REGION3_READ = MWU_REGIONEN_RGN3RA_Msk , NRF_MWU_WATCH_PREGION0_WRITE = MWU_REGIONEN_PRGN0WA_Msk , NRF_MWU_WATCH_PREGION0_READ = MWU_REGIONEN_PRGN0RA_Msk , NRF_MWU_WATCH_PREGION1_WRITE = MWU_REGIONEN_PRGN1WA_Msk , NRF_MWU_WATCH_PREGION1_READ = MWU_REGIONEN_PRGN1RA_Msk } |
| MWU region watch masks. More... | |
Functions | |
| NRF_STATIC_INLINE bool | nrf_mwu_event_check (NRF_MWU_Type const *p_reg, nrf_mwu_event_t event) |
| Function for retrieving the state of the MWU event. | |
| NRF_STATIC_INLINE void | nrf_mwu_event_clear (NRF_MWU_Type *p_reg, nrf_mwu_event_t event) |
| Function for clearing a specific MWU event. | |
| NRF_STATIC_INLINE uint32_t | nrf_mwu_event_address_get (NRF_MWU_Type const *p_reg, nrf_mwu_event_t event) |
| Function for getting the address of a specific MWU event register. | |
| NRF_STATIC_INLINE void | nrf_mwu_int_enable (NRF_MWU_Type *p_reg, uint32_t mask) |
| Function for enabling specified interrupts. | |
| NRF_STATIC_INLINE uint32_t | nrf_mwu_int_enable_check (NRF_MWU_Type const *p_reg, uint32_t mask) |
| Function for checking if the specified interrupts are enabled. | |
| NRF_STATIC_INLINE void | nrf_mwu_int_disable (NRF_MWU_Type *p_reg, uint32_t mask) |
| Function for disabling specified interrupts. | |
| NRF_STATIC_INLINE void | nrf_mwu_nmi_enable (NRF_MWU_Type *p_reg, uint32_t mask) |
| Function for enabling specified non-maskable interrupts. | |
| NRF_STATIC_INLINE uint32_t | nrf_mwu_nmi_enable_check (NRF_MWU_Type const *p_reg, uint32_t mask) |
| Function for checking if the specified non-maskable interrupts are enabled. | |
| NRF_STATIC_INLINE void | nrf_mwu_nmi_disable (NRF_MWU_Type *p_reg, uint32_t mask) |
| Function for disabling specified non-maskable interrupts. | |
| NRF_STATIC_INLINE void | nrf_mwu_user_region_range_set (NRF_MWU_Type *p_reg, uint8_t region_idx, uint32_t start_addr, uint32_t end_addr) |
| Function for setting address range of the specified user region. | |
| NRF_STATIC_INLINE void | nrf_mwu_region_watch_enable (NRF_MWU_Type *p_reg, uint32_t reg_watch_mask) |
| Function for enabling memory access watch mechanism. | |
| NRF_STATIC_INLINE void | nrf_mwu_region_watch_disable (NRF_MWU_Type *p_reg, uint32_t reg_watch_mask) |
| Function for disabling memory access watch mechanism. | |
| NRF_STATIC_INLINE uint32_t | nrf_mwu_region_watch_get (NRF_MWU_Type const *p_reg) |
| Function for getting memory access watch configuration mask. | |
| NRF_STATIC_INLINE void | nrf_mwu_subregions_configure (NRF_MWU_Type *p_reg, uint8_t per_reg_idx, uint32_t subregion_mask) |
| Function for configuring peripheral subregions for watching. | |
| NRF_STATIC_INLINE uint32_t | nrf_mwu_subregions_write_accesses_get (NRF_MWU_Type const *p_reg, uint8_t per_reg_idx) |
| Function for getting the mask of the write access flags of peripheral subregions. | |
| NRF_STATIC_INLINE void | nrf_mwu_subregions_write_accesses_clear (NRF_MWU_Type *p_reg, uint8_t per_reg_idx, uint32_t subregion_mask) |
| Function for clearing write access flags of peripheral subregions. | |
| NRF_STATIC_INLINE uint32_t | nrf_mwu_subregions_read_accesses_get (NRF_MWU_Type const *p_reg, uint8_t per_reg_idx) |
| Function for getting the mask of the read access flags of peripheral subregions. | |
| NRF_STATIC_INLINE void | nrf_mwu_subregions_read_accesses_clear (NRF_MWU_Type *p_reg, uint8_t per_reg_idx, uint32_t subregion_mask) |
| Function for clearing read access flags of peripheral subregions. | |
Hardware access layer for managing the Memory Watch Unit (MWU) peripheral.
| enum nrf_mwu_event_t |
MWU events.
| enum nrf_mwu_int_mask_t |
MWU interrupt masks.
MWU region watch masks.
| NRF_STATIC_INLINE uint32_t nrf_mwu_event_address_get | ( | NRF_MWU_Type const * | p_reg, |
| nrf_mwu_event_t | event ) |
Function for getting the address of a specific MWU event register.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | event | Requested event. |
| NRF_STATIC_INLINE bool nrf_mwu_event_check | ( | NRF_MWU_Type const * | p_reg, |
| nrf_mwu_event_t | event ) |
Function for retrieving the state of the MWU event.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | event | Event to be checked. |
| true | The event has been generated. |
| false | The event has not been generated. |
| NRF_STATIC_INLINE void nrf_mwu_event_clear | ( | NRF_MWU_Type * | p_reg, |
| nrf_mwu_event_t | event ) |
Function for clearing a specific MWU event.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | event | Event to clear. |
| NRF_STATIC_INLINE void nrf_mwu_int_disable | ( | NRF_MWU_Type * | p_reg, |
| uint32_t | mask ) |
Function for disabling specified interrupts.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | mask | Mask of interrupts to be disabled. Use nrf_mwu_int_mask_t values for bit masking. |
| NRF_STATIC_INLINE void nrf_mwu_int_enable | ( | NRF_MWU_Type * | p_reg, |
| uint32_t | mask ) |
Function for enabling specified interrupts.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | mask | Mask of interrupts to be enabled. Use nrf_mwu_int_mask_t values for bit masking. |
| NRF_STATIC_INLINE uint32_t nrf_mwu_int_enable_check | ( | NRF_MWU_Type const * | p_reg, |
| uint32_t | mask ) |
Function for checking if the specified interrupts are enabled.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | mask | Mask of interrupts to be checked. Use nrf_mwu_int_mask_t values for bit masking. |
| NRF_STATIC_INLINE void nrf_mwu_nmi_disable | ( | NRF_MWU_Type * | p_reg, |
| uint32_t | mask ) |
Function for disabling specified non-maskable interrupts.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | mask | Mask of interrupts to be disabled. |
| NRF_STATIC_INLINE void nrf_mwu_nmi_enable | ( | NRF_MWU_Type * | p_reg, |
| uint32_t | mask ) |
Function for enabling specified non-maskable interrupts.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | mask | Mask of interrupts to be enabled. |
| NRF_STATIC_INLINE uint32_t nrf_mwu_nmi_enable_check | ( | NRF_MWU_Type const * | p_reg, |
| uint32_t | mask ) |
Function for checking if the specified non-maskable interrupts are enabled.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | mask | Mask of interrupts to be checked. |
| NRF_STATIC_INLINE void nrf_mwu_region_watch_disable | ( | NRF_MWU_Type * | p_reg, |
| uint32_t | reg_watch_mask ) |
Function for disabling memory access watch mechanism.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | reg_watch_mask | Mask that defines regions and access types to stop watching. Compose this mask from nrf_mwu_region_watch_t values. |
| NRF_STATIC_INLINE void nrf_mwu_region_watch_enable | ( | NRF_MWU_Type * | p_reg, |
| uint32_t | reg_watch_mask ) |
Function for enabling memory access watch mechanism.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | reg_watch_mask | Mask that defines regions and access types to watch. Compose this mask from nrf_mwu_region_watch_t values. |
| NRF_STATIC_INLINE uint32_t nrf_mwu_region_watch_get | ( | NRF_MWU_Type const * | p_reg | ) |
Function for getting memory access watch configuration mask.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| NRF_STATIC_INLINE void nrf_mwu_subregions_configure | ( | NRF_MWU_Type * | p_reg, |
| uint8_t | per_reg_idx, | ||
| uint32_t | subregion_mask ) |
Function for configuring peripheral subregions for watching.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | per_reg_idx | Peripheral region containing specified subregions. |
| [in] | subregion_mask | Mask that defines subregions to include into the specified peripheral region. |
| NRF_STATIC_INLINE void nrf_mwu_subregions_read_accesses_clear | ( | NRF_MWU_Type * | p_reg, |
| uint8_t | per_reg_idx, | ||
| uint32_t | subregion_mask ) |
Function for clearing read access flags of peripheral subregions.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | per_reg_idx | Peripheral region containing subregion accesses to clear. |
| [in] | subregion_mask | Mask that defines subregion read accesses to clear. |
| NRF_STATIC_INLINE uint32_t nrf_mwu_subregions_read_accesses_get | ( | NRF_MWU_Type const * | p_reg, |
| uint8_t | per_reg_idx ) |
Function for getting the mask of the read access flags of peripheral subregions.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | per_reg_idx | Peripheral region containing subregions to be checked. |
| NRF_STATIC_INLINE void nrf_mwu_subregions_write_accesses_clear | ( | NRF_MWU_Type * | p_reg, |
| uint8_t | per_reg_idx, | ||
| uint32_t | subregion_mask ) |
Function for clearing write access flags of peripheral subregions.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | per_reg_idx | Peripheral region containing subregion accesses to clear. |
| [in] | subregion_mask | Mask that defines subregion write accesses to clear. |
| NRF_STATIC_INLINE uint32_t nrf_mwu_subregions_write_accesses_get | ( | NRF_MWU_Type const * | p_reg, |
| uint8_t | per_reg_idx ) |
Function for getting the mask of the write access flags of peripheral subregions.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | per_reg_idx | Peripheral region containing subregions to be checked. |
| NRF_STATIC_INLINE void nrf_mwu_user_region_range_set | ( | NRF_MWU_Type * | p_reg, |
| uint8_t | region_idx, | ||
| uint32_t | start_addr, | ||
| uint32_t | end_addr ) |
Function for setting address range of the specified user region.
| [in] | p_reg | Pointer to the structure of registers of the peripheral. |
| [in] | region_idx | Region number to configure. |
| [in] | start_addr | Memory address defining the beginning of the region. |
| [in] | end_addr | Memory address defining the end of the region. |