nrf_gzll_glue.h

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/*
 * Copyright (c) 2021 Nordic Semiconductor ASA
 *
 * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
 */
 
#ifndef _NRF_GZLL_GLUE_H_
#define _NRF_GZLL_GLUE_H_
 
#include <nrfx.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
#ifdef DOXYGEN
#ifndef __IOM
#define __IOM
#endif
#endif
 
extern NRF_TIMER_Type * const nrf_gzll_timer;
extern IRQn_Type        const nrf_gzll_timer_irqn;
extern IRQn_Type        const nrf_gzll_swi_irqn;
 
#if defined(PPI_PRESENT) || defined(DOXYGEN)
extern __IOM uint32_t * nrf_gzll_ppi_eep0;
extern __IOM uint32_t * nrf_gzll_ppi_tep0;
extern __IOM uint32_t * nrf_gzll_ppi_eep1;
extern __IOM uint32_t * nrf_gzll_ppi_tep1;
extern __IOM uint32_t * nrf_gzll_ppi_eep2;
extern __IOM uint32_t * nrf_gzll_ppi_tep2;
extern       uint32_t   nrf_gzll_ppi_chen_msk_0_and_1;
extern       uint32_t   nrf_gzll_ppi_chen_msk_2;
#endif
 
#if defined(DPPI_PRESENT) || defined(DOXYGEN)
extern uint8_t nrf_gzll_dppi_ch0;
extern uint8_t nrf_gzll_dppi_ch1;
extern uint8_t nrf_gzll_dppi_ch2;
extern uint32_t nrf_gzll_dppi_chen_msk_0_and_1;
extern uint32_t nrf_gzll_dppi_chen_msk_2;
#endif
 
 
void nrf_gzll_delay_us(uint32_t usec_to_wait);
 
void nrf_gzll_request_xosc(void);
 
void nrf_gzll_release_xosc(void);
 
void nrf_gzll_radio_irq_handler(void);
 
void nrf_gzll_timer_irq_handler(void);
 
void nrf_gzll_swi_irq_handler(void);
 
#ifdef __cplusplus
}
#endif
 
#endif /* _NRF_GZLL_GLUE_H_ */