Zephyr API 3.6.99
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amebag2_clock.h
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1/*
2 * Copyright (c) 2024 Realtek Semiconductor Corp.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_AMEBAG2_CLOCK_H_
8#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_AMEBAG2_CLOCK_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif
13
26#define AMEBA_ATIM_CLK 1
27
29#define AMEBA_RTC_CLK 2
30
32#define AMEBA_LEDC_CLK 3
33
42#define AMEBA_PWM0_CLK 4
43
45#define AMEBA_PWM1_CLK 5
46
48#define AMEBA_PWM2_CLK 6
49
51#define AMEBA_PWM3_CLK 7
52
54#define AMEBA_PWM4_CLK 8
55
57#define AMEBA_UART0_CLK 9
58
60#define AMEBA_UART1_CLK 10
61
63#define AMEBA_UART2_CLK 11
64
66#define AMEBA_UART3_CLK 12
67
69#define AMEBA_LOGUART_CLK 13
70
72#define AMEBA_DTIM_CLK 14
73
75#define AMEBA_ADC_CLK 15
76
78#define AMEBA_GPIO_CLK 16
79
81#define AMEBA_LTIM0_CLK 17
82
84#define AMEBA_LTIM1_CLK 18
85
87#define AMEBA_LTIM2_CLK 19
88
90#define AMEBA_LTIM3_CLK 20
91
93#define AMEBA_PTIM0_CLK 21
94
96#define AMEBA_PTIM1_CLK 22
97
106#define AMEBA_DMAC_CLK 23
107
109#define AMEBA_SDH_CLK 24
110
112#define AMEBA_SDD_CLK 25
113
115#define AMEBA_SPI0_CLK 26
116
118#define AMEBA_SPI1_CLK 27
119
121#define AMEBA_USB_CLK 28
122
124#define AMEBA_FLASH_CLK 29
125
127#define AMEBA_PSRAM_CLK 30
128
130#define AMEBA_SPORT_CLK 31
131
133#define AMEBA_AC_CLK 32
134
136#define AMEBA_IRDA_CLK 33
137
139#define AMEBA_I2C0_CLK 34
140
142#define AMEBA_I2C1_CLK 35
143
145#define AMEBA_TRNG_CLK 36
146
148#define AMEBA_LCDC_CLK 37
149
151#define AMEBA_A2C0_CLK 38
152
154#define AMEBA_A2C1_CLK 39
155
157#define AMEBA_GMAC_CLK 40
158
160#define AMEBA_PPE_CLK 41
161
163#define AMEBA_MJPEG_CLK 42
164
173#define AMEBA_BTON_CLK 43
174
176#define AMEBA_PKE_CLK 44
177
181#define AMEBA_CLK_MAX 45 /* clk idx max */
182
198#define AMEBA_NUMERICAL_PERIPH(name, n) \
199 [AMEBA_##name##n##_CLK] = { \
200 .parent = AMEBA_RCC_NO_PARENT, \
201 .cke = APBPeriph_##name##n##_CLOCK, \
202 .fen = APBPeriph_##name##n, \
203 },
204
213#define AMEBA_SINGLE_PERIPH(name) \
214 [AMEBA_##name##_CLK] = { \
215 .parent = AMEBA_RCC_NO_PARENT, \
216 .cke = APBPeriph_##name##_CLOCK, \
217 .fen = APBPeriph_##name, \
218 },
219
227#define AMEBA_SINGLE_PERIPH_NO_FEN(name) \
228 [AMEBA_##name##_CLK] = { \
229 .parent = AMEBA_RCC_NO_PARENT, \
230 .cke = APBPeriph_##name##_CLOCK, \
231 .fen = APBPeriph_NULL, \
232 },
233
237#define AMEBA_LTIM_PERIPHS \
238 AMEBA_NUMERICAL_PERIPH(LTIM, 0) /* AMEBA_LTIM0_CLK */ \
239 AMEBA_NUMERICAL_PERIPH(LTIM, 1) /* AMEBA_LTIM1_CLK */ \
240 AMEBA_NUMERICAL_PERIPH(LTIM, 2) /* AMEBA_LTIM2_CLK */ \
241 AMEBA_NUMERICAL_PERIPH(LTIM, 3) /* AMEBA_LTIM3_CLK */
242
246#define AMEBA_PTIM_PERIPHS \
247 AMEBA_NUMERICAL_PERIPH(PTIM, 0) /* AMEBA_PTIM0_CLK */ \
248 AMEBA_NUMERICAL_PERIPH(PTIM, 1) /* AMEBA_PTIM1_CLK */
249
253#define AMEBA_SPI_PERIPHS \
254 AMEBA_NUMERICAL_PERIPH(SPI, 0) /* AMEBA_SPI0_CLK */ \
255 AMEBA_NUMERICAL_PERIPH(SPI, 1) /* AMEBA_SPI1_CLK */
256
260#define AMEBA_I2C_PERIPHS \
261 AMEBA_NUMERICAL_PERIPH(I2C, 0) /* AMEBA_I2C0_CLK */ \
262 AMEBA_NUMERICAL_PERIPH(I2C, 1) /* AMEBA_I2C1_CLK */
263
267#define AMEBA_PWM_PERIPHS \
268 AMEBA_NUMERICAL_PERIPH(PWM, 0) /* AMEBA_PWM0_CLK */ \
269 AMEBA_NUMERICAL_PERIPH(PWM, 1) /* AMEBA_PWM1_CLK */ \
270 AMEBA_NUMERICAL_PERIPH(PWM, 2) /* AMEBA_PWM2_CLK */ \
271 AMEBA_NUMERICAL_PERIPH(PWM, 3) /* AMEBA_PWM3_CLK */ \
272 AMEBA_NUMERICAL_PERIPH(PWM, 4) /* AMEBA_PWM4_CLK */
273
277#define AMEBA_UART_PERIPHS \
278 AMEBA_NUMERICAL_PERIPH(UART, 0) /* AMEBA_UART0_CLK */ \
279 AMEBA_NUMERICAL_PERIPH(UART, 1) /* AMEBA_UART1_CLK */ \
280 AMEBA_NUMERICAL_PERIPH(UART, 2) /* AMEBA_UART2_CLK */ \
281 AMEBA_NUMERICAL_PERIPH(UART, 3) /* AMEBA_UART3_CLK */
282
286#define AMEBA_A2C_PERIPHS \
287 AMEBA_NUMERICAL_PERIPH(A2C, 0) /* AMEBA_A2C0_CLK */ \
288 AMEBA_NUMERICAL_PERIPH(A2C, 1) /* AMEBA_A2C1_CLK */
289
293#define AMEBA_LOGUART_PERIPHS AMEBA_SINGLE_PERIPH(LOGUART) /* AMEBA_LOGUART_CLK */
294
298#define AMEBA_DMAC_PERIPHS AMEBA_SINGLE_PERIPH(DMAC) /* AMEBA_DMAC_CLK */
299
303#define AMEBA_SDH_PERIPHS AMEBA_SINGLE_PERIPH(SDH) /* AMEBA_SDH_CLK */
304
308#define AMEBA_SDD_PERIPHS AMEBA_SINGLE_PERIPH(SDD) /* AMEBA_SDD_CLK */
309
313#define AMEBA_USB_PERIPHS AMEBA_SINGLE_PERIPH(USB) /* AMEBA_USB_CLK */
314
318#define AMEBA_FLASH_PERIPHS AMEBA_SINGLE_PERIPH(FLASH) /* AMEBA_FLASH_CLK */
319
323#define AMEBA_PSRAM_PERIPHS AMEBA_SINGLE_PERIPH(PSRAM) /* AMEBA_PSRAM_CLK */
324
328#define AMEBA_AC_PERIPHS AMEBA_SINGLE_PERIPH(AC) /* AMEBA_AC_CLK */
329
333#define AMEBA_IRDA_PERIPHS AMEBA_SINGLE_PERIPH(IRDA) /* AMEBA_IRDA_CLK */
334
338#define AMEBA_TRNG_PERIPHS AMEBA_SINGLE_PERIPH(TRNG) /* AMEBA_TRNG_CLK */
339
343#define AMEBA_LCDC_PERIPHS AMEBA_SINGLE_PERIPH(LCDC) /* AMEBA_LCDC_CLK */
344
348#define AMEBA_RTC_PERIPHS AMEBA_SINGLE_PERIPH_NO_FEN(RTC) /* AMEBA_RTC_CLK */
349
353#define AMEBA_LEDC_PERIPHS AMEBA_SINGLE_PERIPH(LEDC) /* AMEBA_LEDC_CLK */
354
358#define AMEBA_ADC_PERIPHS AMEBA_SINGLE_PERIPH(ADC) /* AMEBA_ADC_CLK */
359
363#define AMEBA_GPIO_PERIPHS AMEBA_SINGLE_PERIPH(GPIO) /* AMEBA_GPIO_CLK */
364
368#define AMEBA_BTON_PERIPHS AMEBA_SINGLE_PERIPH(BTON) /* AMEBA_BTON_CLK */
369
373#define AMEBA_SPORT_PERIPHS AMEBA_SINGLE_PERIPH(SPORT) /* AMEBA_SPORT_CLK */
374
378#define AMEBA_GMAC_PERIPHS AMEBA_SINGLE_PERIPH(GMAC) /* AMEBA_GMAC_CLK */
379
383#define AMEBA_PPE_PERIPHS AMEBA_SINGLE_PERIPH(PPE) /* AMEBA_PPE_CLK */
384
388#define AMEBA_MJPEG_PERIPHS AMEBA_SINGLE_PERIPH(MJPEG) /* AMEBA_MJPEG_CLK */
389
396#define AMEBA_CORE_PERIPHS \
397 AMEBA_RTC_PERIPHS \
398 AMEBA_PWM_PERIPHS \
399 AMEBA_LEDC_PERIPHS \
400 AMEBA_UART_PERIPHS \
401 AMEBA_LOGUART_PERIPHS \
402 AMEBA_ADC_PERIPHS \
403 AMEBA_GPIO_PERIPHS \
404 AMEBA_LTIM_PERIPHS \
405 AMEBA_PTIM_PERIPHS \
406 AMEBA_DMAC_PERIPHS \
407 AMEBA_SDH_PERIPHS \
408 AMEBA_SDD_PERIPHS \
409 AMEBA_SPI_PERIPHS \
410 AMEBA_USB_PERIPHS \
411 AMEBA_FLASH_PERIPHS \
412 AMEBA_SPORT_PERIPHS \
413 AMEBA_AC_PERIPHS \
414 AMEBA_I2C_PERIPHS \
415 AMEBA_TRNG_PERIPHS \
416 AMEBA_LCDC_PERIPHS \
417 AMEBA_A2C_PERIPHS \
418 AMEBA_GMAC_PERIPHS \
419 AMEBA_PPE_PERIPHS \
420 AMEBA_MJPEG_PERIPHS \
421 AMEBA_BTON_PERIPHS
422
425#ifdef __cplusplus
426}
427#endif
428
429#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_AMEBAG2_CLOCK_H_ */