Zephyr API 4.4.99
A Scalable Open Source RTOS
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clock_control_bflb_common.h
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1/*
2 * Copyright (c) 2025 MASSDRIVER EI (massdriver.space)
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
12
13#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_BFLB_COMMON_H_
14#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_BFLB_COMMON_H_
15
21
25#define BFLB_MAIN_CLOCK_RC32M 0
27#define BFLB_MAIN_CLOCK_XTAL 1
29#define BFLB_MAIN_CLOCK_PLL_RC32M 2
31#define BFLB_MAIN_CLOCK_PLL_XTAL 3
33
35static inline void clock_bflb_settle(void)
36{
37 __asm__ volatile (".rept 20 ; nop ; .endr");
38}
39
46static inline void clock_bflb_set_root_clock(uint32_t clock)
47{
48 uint32_t tmp;
49
50 /* invalid value, fallback to internal 32M */
51 if (clock > BFLB_MAIN_CLOCK_PLL_XTAL) {
52 clock = BFLB_MAIN_CLOCK_RC32M;
53 }
54 tmp = sys_read32(HBN_BASE + HBN_GLB_OFFSET);
55 tmp = (tmp & HBN_ROOT_CLK_SEL_UMSK) | (clock << HBN_ROOT_CLK_SEL_POS);
56 sys_write32(tmp, HBN_BASE + HBN_GLB_OFFSET);
57
58 clock_bflb_settle();
59}
60
66static inline uint32_t clock_bflb_get_root_clock(void)
67{
68 uint32_t tmp;
69
70 tmp = sys_read32(HBN_BASE + HBN_GLB_OFFSET);
71 return ((tmp & HBN_ROOT_CLK_SEL_MSK) >> HBN_ROOT_CLK_SEL_POS);
72}
73
74
76
77/* Avoid overflow when calculating multipliers */
78#define BFLB_MUL_CLK(_value, _top, _base) \
79 (((uint64_t)(_value) * (uint64_t)(_top)) / (uint64_t)(_base))
80
82
84
85#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_BFLB_COMMON_H_ */
clock_bflb_get_root_clock
static uint32_t clock_bflb_get_root_clock(void)
Get the currently selected root (main) clock source.
Definition clock_control_bflb_common.h:66
clock_bflb_settle
static void clock_bflb_settle(void)
Busy-wait for a few CPU cycles to let a clock change settle.
Definition clock_control_bflb_common.h:35
BFLB_MAIN_CLOCK_RC32M
#define BFLB_MAIN_CLOCK_RC32M
XCLK is RC32M, main clock is XCLK.
Definition clock_control_bflb_common.h:25
BFLB_MAIN_CLOCK_PLL_XTAL
#define BFLB_MAIN_CLOCK_PLL_XTAL
XCLK is the crystal, main clock is the PLL.
Definition clock_control_bflb_common.h:31
clock_bflb_set_root_clock
static void clock_bflb_set_root_clock(uint32_t clock)
Select the root (main) clock source.
Definition clock_control_bflb_common.h:46
sys_read32
static uint32_t sys_read32(mm_reg_t addr)
Read 32 bits from a memory mapped register.
sys_write32
static void sys_write32(uint32_t data, mm_reg_t addr)
Write 32 bits to a memory mapped register.
uint32_t
__UINT32_TYPE__ uint32_t
Definition stdint.h:90