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clock_control_numaker.h
Go to the documentation of this file.
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/*
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* Copyright (c) 2023 Nuvoton Technology Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <
stdint.h
>
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#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_NUMAKER_H_
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#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_NUMAKER_H_
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#define NUMAKER_SCC_CLKSW_UNTOUCHED 0
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#define NUMAKER_SCC_CLKSW_ENABLE 1
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#define NUMAKER_SCC_CLKSW_DISABLE 2
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#define NUMAKER_SCC_SUBSYS_ID_PCC 1
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struct
numaker_scc_subsys_pcc
{
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uint32_t
clk_modidx
;
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uint32_t
clk_src
;
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uint32_t
clk_div
;
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};
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struct
numaker_scc_subsys_pcc_rate
{
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#if defined(CONFIG_SOC_SERIES_M55M1X)
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uint64_t
clk_modidx_real
;
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#else
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uint32_t
clk_modidx_real
;
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#endif
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uint32_t
clk_src_idx
;
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uint32_t
clk_src_rate
;
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uint32_t
clk_div_value
;
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uint32_t
clk_div_value_max
;
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uint32_t
clk_mod_rate
;
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};
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struct
numaker_scc_subsys
{
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uint32_t
subsys_id
;
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union
{
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struct
numaker_scc_subsys_pcc
pcc
;
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};
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};
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struct
numaker_scc_subsys_rate
{
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union
{
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struct
numaker_scc_subsys_pcc_rate
pcc
;
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};
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};
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#endif
/* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_NUMAKER_H_ */
stdint.h
uint32_t
__UINT32_TYPE__ uint32_t
Definition
stdint.h:90
uint64_t
__UINT64_TYPE__ uint64_t
Definition
stdint.h:91
numaker_scc_subsys_pcc_rate
Peripheral clock control rate information.
Definition
clock_control_numaker.h:45
numaker_scc_subsys_pcc_rate::clk_src_rate
uint32_t clk_src_rate
Clock source rate, in Hz.
Definition
clock_control_numaker.h:52
numaker_scc_subsys_pcc_rate::clk_div_value
uint32_t clk_div_value
Decoded clock divider value.
Definition
clock_control_numaker.h:53
numaker_scc_subsys_pcc_rate::clk_modidx_real
uint32_t clk_modidx_real
Resolved module index.
Definition
clock_control_numaker.h:49
numaker_scc_subsys_pcc_rate::clk_src_idx
uint32_t clk_src_idx
Decoded clock source index of clk_src.
Definition
clock_control_numaker.h:51
numaker_scc_subsys_pcc_rate::clk_div_value_max
uint32_t clk_div_value_max
Maximum supported divider value.
Definition
clock_control_numaker.h:54
numaker_scc_subsys_pcc_rate::clk_mod_rate
uint32_t clk_mod_rate
Resulting module clock rate, in Hz.
Definition
clock_control_numaker.h:55
numaker_scc_subsys_pcc
Peripheral clock control configuration.
Definition
clock_control_numaker.h:35
numaker_scc_subsys_pcc::clk_modidx
uint32_t clk_modidx
Module index (u32ModuleIdx/u64ModuleIdx in BSP CLK_SetModuleClock()).
Definition
clock_control_numaker.h:37
numaker_scc_subsys_pcc::clk_src
uint32_t clk_src
Clock source (u32ClkSrc in BSP CLK_SetModuleClock()).
Definition
clock_control_numaker.h:39
numaker_scc_subsys_pcc::clk_div
uint32_t clk_div
Clock divider (u32ClkDiv in BSP CLK_SetModuleClock()).
Definition
clock_control_numaker.h:41
numaker_scc_subsys_rate
NuMaker clock subsystem rate selector.
Definition
clock_control_numaker.h:68
numaker_scc_subsys_rate::pcc
struct numaker_scc_subsys_pcc_rate pcc
Peripheral clock rate information.
Definition
clock_control_numaker.h:70
numaker_scc_subsys
NuMaker clock subsystem selector.
Definition
clock_control_numaker.h:59
numaker_scc_subsys::subsys_id
uint32_t subsys_id
SCC subsystem ID (see NUMAKER_SCC_SUBSYS_ID_PCC).
Definition
clock_control_numaker.h:60
numaker_scc_subsys::pcc
struct numaker_scc_subsys_pcc pcc
Peripheral clock configuration.
Definition
clock_control_numaker.h:63
zephyr
drivers
clock_control
clock_control_numaker.h
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