Zephyr API 4.4.99
A Scalable Open Source RTOS
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gpio.h
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1/*
2 * Copyright (c) 2019-2020 Nordic Semiconductor ASA
3 * Copyright (c) 2019 Piotr Mienkowski
4 * Copyright (c) 2017 ARM Ltd
5 * Copyright (c) 2015-2016 Intel Corporation.
6 *
7 * SPDX-License-Identifier: Apache-2.0
8 */
9
15
16#ifndef ZEPHYR_INCLUDE_DRIVERS_GPIO_H_
17#define ZEPHYR_INCLUDE_DRIVERS_GPIO_H_
18
19#include <errno.h>
20
21#include <zephyr/sys/__assert.h>
22#include <zephyr/sys/slist.h>
24
25#include <zephyr/types.h>
26#include <stddef.h>
27#include <zephyr/device.h>
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
48
53
55#define GPIO_INPUT BIT(16)
56
58#define GPIO_OUTPUT BIT(17)
59
61#define GPIO_DISCONNECTED 0
62
64
65/* Initializes output to a low state. */
66#define GPIO_OUTPUT_INIT_LOW BIT(18)
67
68/* Initializes output to a high state. */
69#define GPIO_OUTPUT_INIT_HIGH BIT(19)
70
71/* Initializes output based on logic level */
72#define GPIO_OUTPUT_INIT_LOGICAL BIT(20)
73
75
77#define GPIO_OUTPUT_LOW (GPIO_OUTPUT | GPIO_OUTPUT_INIT_LOW)
79#define GPIO_OUTPUT_HIGH (GPIO_OUTPUT | GPIO_OUTPUT_INIT_HIGH)
81#define GPIO_OUTPUT_INACTIVE (GPIO_OUTPUT | \
82 GPIO_OUTPUT_INIT_LOW | \
83 GPIO_OUTPUT_INIT_LOGICAL)
84
85#define GPIO_OUTPUT_ACTIVE (GPIO_OUTPUT | \
86 GPIO_OUTPUT_INIT_HIGH | \
87 GPIO_OUTPUT_INIT_LOGICAL)
88
90
106
108#define GPIO_INT_DISABLE BIT(21)
109
111
112/* Enables GPIO pin interrupt. */
113#define GPIO_INT_ENABLE BIT(22)
114
115/* GPIO interrupt is sensitive to logical levels.
116 *
117 * This is a component flag that should be combined with other
118 * `GPIO_INT_*` flags to produce a meaningful configuration.
119 */
120#define GPIO_INT_LEVELS_LOGICAL BIT(23)
121
122/* GPIO interrupt is edge sensitive.
123 *
124 * Note: by default interrupts are level sensitive.
125 *
126 * This is a component flag that should be combined with other
127 * `GPIO_INT_*` flags to produce a meaningful configuration.
128 */
129#define GPIO_INT_EDGE BIT(24)
130
131/* Trigger detection when input state is (or transitions to) physical low or
132 * logical 0 level.
133 *
134 * This is a component flag that should be combined with other
135 * `GPIO_INT_*` flags to produce a meaningful configuration.
136 */
137#define GPIO_INT_LOW_0 BIT(25)
138
139/* Trigger detection on input state is (or transitions to) physical high or
140 * logical 1 level.
141 *
142 * This is a component flag that should be combined with other
143 * `GPIO_INT_*` flags to produce a meaningful configuration.
144 */
145#define GPIO_INT_HIGH_1 BIT(26)
146
147#ifdef CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT
148/* Disable/Enable interrupt functionality without changing other interrupt
149 * related register, such as clearing the pending register.
150 *
151 * This is a component flag that should be combined with `GPIO_INT_ENABLE` or
152 * `GPIO_INT_DISABLE` flags to produce a meaningful configuration.
153 */
154#define GPIO_INT_ENABLE_DISABLE_ONLY BIT(27)
155#endif /* CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT */
156
157#define GPIO_INT_MASK (GPIO_INT_DISABLE | \
158 GPIO_INT_ENABLE | \
159 GPIO_INT_LEVELS_LOGICAL | \
160 GPIO_INT_EDGE | \
161 GPIO_INT_LOW_0 | \
162 GPIO_INT_HIGH_1)
163
165
168#define GPIO_INT_EDGE_RISING (GPIO_INT_ENABLE | \
169 GPIO_INT_EDGE | \
170 GPIO_INT_HIGH_1)
171
175#define GPIO_INT_EDGE_FALLING (GPIO_INT_ENABLE | \
176 GPIO_INT_EDGE | \
177 GPIO_INT_LOW_0)
178
182#define GPIO_INT_EDGE_BOTH (GPIO_INT_ENABLE | \
183 GPIO_INT_EDGE | \
184 GPIO_INT_LOW_0 | \
185 GPIO_INT_HIGH_1)
186
190#define GPIO_INT_LEVEL_LOW (GPIO_INT_ENABLE | \
191 GPIO_INT_LOW_0)
192
196#define GPIO_INT_LEVEL_HIGH (GPIO_INT_ENABLE | \
197 GPIO_INT_HIGH_1)
198
202#define GPIO_INT_EDGE_TO_INACTIVE (GPIO_INT_ENABLE | \
203 GPIO_INT_LEVELS_LOGICAL | \
204 GPIO_INT_EDGE | \
205 GPIO_INT_LOW_0)
206
210#define GPIO_INT_EDGE_TO_ACTIVE (GPIO_INT_ENABLE | \
211 GPIO_INT_LEVELS_LOGICAL | \
212 GPIO_INT_EDGE | \
213 GPIO_INT_HIGH_1)
214
218#define GPIO_INT_LEVEL_INACTIVE (GPIO_INT_ENABLE | \
219 GPIO_INT_LEVELS_LOGICAL | \
220 GPIO_INT_LOW_0)
221
225#define GPIO_INT_LEVEL_ACTIVE (GPIO_INT_ENABLE | \
226 GPIO_INT_LEVELS_LOGICAL | \
227 GPIO_INT_HIGH_1)
228
230
232#define GPIO_DIR_MASK (GPIO_INPUT | GPIO_OUTPUT)
234
242
255
263
275
283
304
339#define GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, idx) \
340 { \
341 .port = DEVICE_DT_GET(DT_GPIO_CTLR_BY_IDX(node_id, prop, idx)),\
342 .pin = DT_GPIO_PIN_BY_IDX(node_id, prop, idx), \
343 .dt_flags = DT_GPIO_FLAGS_BY_IDX(node_id, prop, idx), \
344 }
345
363#define GPIO_DT_SPEC_GET_BY_IDX_OR(node_id, prop, idx, default_value) \
364 COND_CODE_1(DT_PROP_HAS_IDX(node_id, prop, idx), \
365 (GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, idx)), \
366 (default_value))
367
376#define GPIO_DT_SPEC_GET(node_id, prop) \
377 GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, 0)
378
389#define GPIO_DT_SPEC_GET_OR(node_id, prop, default_value) \
390 GPIO_DT_SPEC_GET_BY_IDX_OR(node_id, prop, 0, default_value)
391
402#define GPIO_DT_SPEC_INST_GET_BY_IDX(inst, prop, idx) \
403 GPIO_DT_SPEC_GET_BY_IDX(DT_DRV_INST(inst), prop, idx)
404
416#define GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, prop, idx, default_value) \
417 COND_CODE_1(DT_PROP_HAS_IDX(DT_DRV_INST(inst), prop, idx), \
418 (GPIO_DT_SPEC_GET_BY_IDX(DT_DRV_INST(inst), prop, idx)), \
419 (default_value))
420
429#define GPIO_DT_SPEC_INST_GET(inst, prop) \
430 GPIO_DT_SPEC_INST_GET_BY_IDX(inst, prop, 0)
431
442#define GPIO_DT_SPEC_INST_GET_OR(inst, prop, default_value) \
443 GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, prop, 0, default_value)
444
445/*
446 * @cond INTERNAL_HIDDEN
447 */
448
459#define Z_GPIO_GEN_BITMASK_COND(node_id, prop, off_idx, sz_idx) \
460 COND_CODE_1(DT_PROP_HAS_IDX(node_id, prop, off_idx), \
461 (COND_CODE_0(DT_PROP_BY_IDX(node_id, prop, sz_idx), \
462 (0), \
463 (GENMASK64(DT_PROP_BY_IDX(node_id, prop, off_idx) + \
464 DT_PROP_BY_IDX(node_id, prop, sz_idx) - 1, \
465 DT_PROP_BY_IDX(node_id, prop, off_idx)))) \
466 ), (0))
467
475#define Z_GPIO_GEN_RESERVED_RANGES_COND(odd_it, node_id) \
476 COND_CODE_1(DT_PROP_HAS_IDX(node_id, gpio_reserved_ranges, odd_it), \
477 (Z_GPIO_GEN_BITMASK_COND(node_id, \
478 gpio_reserved_ranges, \
479 GET_ARG_N(odd_it, Z_SPARSE_LIST_EVEN_NUMBERS), \
480 odd_it)), \
481 (0))
482
486
574#define GPIO_DT_RESERVED_RANGES_NGPIOS(node_id, ngpios) \
575 ((gpio_port_pins_t) \
576 COND_CODE_1(DT_NODE_HAS_PROP(node_id, gpio_reserved_ranges), \
577 (GENMASK64(BITS_PER_LONG_LONG - 1, ngpios) \
578 | FOR_EACH_FIXED_ARG(Z_GPIO_GEN_RESERVED_RANGES_COND, \
579 (|), \
580 node_id, \
581 LIST_DROP_EMPTY(Z_SPARSE_LIST_ODD_NUMBERS))), \
582 (0)))
583
591#define GPIO_DT_RESERVED_RANGES(node_id) \
592 GPIO_DT_RESERVED_RANGES_NGPIOS(node_id, DT_PROP(node_id, ngpios))
593
603#define GPIO_DT_INST_RESERVED_RANGES_NGPIOS(inst, ngpios) \
604 GPIO_DT_RESERVED_RANGES_NGPIOS(DT_DRV_INST(inst), ngpios)
605
614#define GPIO_DT_INST_RESERVED_RANGES(inst) \
615 GPIO_DT_RESERVED_RANGES(DT_DRV_INST(inst))
616
665#define GPIO_DT_PORT_PIN_MASK_NGPIOS_EXC(node_id, ngpios) \
666 ((gpio_port_pins_t) \
667 COND_CODE_0(ngpios, \
668 (0), \
669 (COND_CODE_1(DT_NODE_HAS_PROP(node_id, gpio_reserved_ranges), \
670 ((GENMASK64(ngpios - 1, 0) & \
671 ~GPIO_DT_RESERVED_RANGES_NGPIOS(node_id, ngpios))), \
672 (GENMASK64(ngpios - 1, 0))) \
673 ) \
674 ))
675
685#define GPIO_DT_INST_PORT_PIN_MASK_NGPIOS_EXC(inst, ngpios) \
686 GPIO_DT_PORT_PIN_MASK_NGPIOS_EXC(DT_DRV_INST(inst), ngpios)
687
691#define GPIO_MAX_PINS_PER_PORT (sizeof(gpio_port_pins_t) * __CHAR_BIT__)
692
708static inline bool gpio_port_pin_is_supported(gpio_port_pins_t port_pin_mask, gpio_pin_t pin)
709{
710 if (pin >= GPIO_MAX_PINS_PER_PORT) {
711 return false;
712 }
713
714 return (port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U;
715}
716
730
743
744struct gpio_callback;
745
757typedef void (*gpio_callback_handler_t)(const struct device *port,
758 struct gpio_callback *cb,
759 gpio_port_pins_t pins);
760
788
794
795/* Used by driver api function pin_interrupt_configure, these are defined
796 * in terms of the public flags so we can just mask and pass them
797 * through to the driver api
798 */
799enum gpio_int_mode {
800 GPIO_INT_MODE_DISABLED = GPIO_INT_DISABLE,
801 GPIO_INT_MODE_LEVEL = GPIO_INT_ENABLE,
802 GPIO_INT_MODE_EDGE = GPIO_INT_ENABLE | GPIO_INT_EDGE,
803#ifdef CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT
804 GPIO_INT_MODE_DISABLE_ONLY = GPIO_INT_DISABLE | GPIO_INT_ENABLE_DISABLE_ONLY,
805 GPIO_INT_MODE_ENABLE_ONLY = GPIO_INT_ENABLE | GPIO_INT_ENABLE_DISABLE_ONLY,
806#endif /* CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT */
807};
808
809enum gpio_int_trig {
810 /* Trigger detection when input state is (or transitions to)
811 * physical low. (Edge Falling or Active Low)
812 */
813 GPIO_INT_TRIG_LOW = GPIO_INT_LOW_0,
814 /* Trigger detection when input state is (or transitions to)
815 * physical high. (Edge Rising or Active High) */
816 GPIO_INT_TRIG_HIGH = GPIO_INT_HIGH_1,
817 /* Trigger detection on pin rising or falling edge. */
818 GPIO_INT_TRIG_BOTH = GPIO_INT_LOW_0 | GPIO_INT_HIGH_1,
819 /* Trigger a system wakeup. */
820 GPIO_INT_TRIG_WAKE = GPIO_INT_WAKEUP,
821 /* Trigger a system wakeup when input state is (or transitions to)
822 * physical low. (Edge Falling or Active Low)
823 */
824 GPIO_INT_TRIG_WAKE_LOW = GPIO_INT_LOW_0 | GPIO_INT_WAKEUP,
825 /* Trigger a system wakeup when input state is (or transitions to)
826 * physical high. (Edge Rising or Active High)
827 */
828 GPIO_INT_TRIG_WAKE_HIGH = GPIO_INT_HIGH_1 | GPIO_INT_WAKEUP,
829 /* Trigger a system wakeup on pin rising or falling edge. */
830 GPIO_INT_TRIG_WAKE_BOTH = GPIO_INT_LOW_0 | GPIO_INT_HIGH_1 | GPIO_INT_WAKEUP,
831};
832
833__subsystem struct gpio_driver_api {
834 int (*pin_configure)(const struct device *port, gpio_pin_t pin,
836#ifdef CONFIG_GPIO_GET_CONFIG
837 int (*pin_get_config)(const struct device *port, gpio_pin_t pin,
839#endif
840 int (*port_get_raw)(const struct device *port,
841 gpio_port_value_t *value);
842 int (*port_set_masked_raw)(const struct device *port,
843 gpio_port_pins_t mask,
844 gpio_port_value_t value);
845 int (*port_set_bits_raw)(const struct device *port,
846 gpio_port_pins_t pins);
847 int (*port_clear_bits_raw)(const struct device *port,
848 gpio_port_pins_t pins);
849 int (*port_toggle_bits)(const struct device *port,
850 gpio_port_pins_t pins);
851 int (*pin_interrupt_configure)(const struct device *port,
852 gpio_pin_t pin,
853 enum gpio_int_mode mode,
854 enum gpio_int_trig trig);
855 int (*manage_callback)(const struct device *port,
856 struct gpio_callback *cb,
857 bool set);
858 uint32_t (*get_pending_int)(const struct device *dev);
859#ifdef CONFIG_GPIO_GET_DIRECTION
860 int (*port_get_direction)(const struct device *port, gpio_port_pins_t map,
861 gpio_port_pins_t *inputs, gpio_port_pins_t *outputs);
862#endif /* CONFIG_GPIO_GET_DIRECTION */
863};
864
868
877static inline bool gpio_is_ready_dt(const struct gpio_dt_spec *spec)
878{
879 /* Validate port is ready */
880 return device_is_ready(spec->port);
881}
882
906__syscall int gpio_pin_interrupt_configure(const struct device *port,
907 gpio_pin_t pin,
909
910static inline int z_impl_gpio_pin_interrupt_configure(const struct device *port,
911 gpio_pin_t pin,
913{
914 const struct gpio_driver_api *api = DEVICE_API_GET(gpio, port);
915 __unused const struct gpio_driver_config *const cfg =
916 (const struct gpio_driver_config *)port->config;
917 const struct gpio_driver_data *const data =
918 (const struct gpio_driver_data *)port->data;
919 enum gpio_int_trig trig;
920 enum gpio_int_mode mode;
921 int ret;
922
923 SYS_PORT_TRACING_FUNC_ENTER(gpio_pin, interrupt_configure, port, pin, flags);
924
925 if (api->pin_interrupt_configure == NULL) {
926 SYS_PORT_TRACING_FUNC_EXIT(gpio_pin, interrupt_configure, port, pin, -ENOSYS);
927 return -ENOSYS;
928 }
929
930 __ASSERT((flags & (GPIO_INT_DISABLE | GPIO_INT_ENABLE))
931 != (GPIO_INT_DISABLE | GPIO_INT_ENABLE),
932 "Cannot both enable and disable interrupts");
933
934 __ASSERT((flags & (GPIO_INT_DISABLE | GPIO_INT_ENABLE)) != 0U,
935 "Must either enable or disable interrupts");
936
937 __ASSERT(((flags & GPIO_INT_ENABLE) == 0) ||
938 ((flags & GPIO_INT_EDGE) != 0) ||
939 ((flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)) !=
940 (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)),
941 "Only one of GPIO_INT_LOW_0, GPIO_INT_HIGH_1 can be "
942 "enabled for a level interrupt.");
943
945#ifdef CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT
946#define GPIO_INT_ENABLE_DISABLE_ONLY_VALUE GPIO_INT_ENABLE_DISABLE_ONLY
947#else
948#define GPIO_INT_ENABLE_DISABLE_ONLY_VALUE 0
949#endif /* CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT */
951
952 __ASSERT(((flags & GPIO_INT_ENABLE) == 0) ||
953 ((flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)) != 0) ||
954 (flags & GPIO_INT_ENABLE_DISABLE_ONLY_VALUE) != 0,
955 "At least one of GPIO_INT_LOW_0, GPIO_INT_HIGH_1 has to be enabled.");
956#undef GPIO_INT_ENABLE_DISABLE_ONLY_VALUE
957 __ASSERT(gpio_port_pin_is_supported(cfg->port_pin_mask, pin), "Unsupported pin");
958
959 /* See the note in z_impl_gpio_pin_configure(). */
960 if (pin >= GPIO_MAX_PINS_PER_PORT) {
961 SYS_PORT_TRACING_FUNC_EXIT(gpio_pin, interrupt_configure, port, pin, -EINVAL);
962 return -EINVAL;
963 }
964
965 if (((flags & GPIO_INT_LEVELS_LOGICAL) != 0) &&
966 ((data->invert & (gpio_port_pins_t)BIT(pin)) != 0)) {
967 /* Invert signal bits */
968 flags ^= (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1);
969 }
970
971 trig = (enum gpio_int_trig)(flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1 | GPIO_INT_WAKEUP));
972#ifdef CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT
973 mode = (enum gpio_int_mode)(flags & (GPIO_INT_EDGE | GPIO_INT_DISABLE | GPIO_INT_ENABLE |
974 GPIO_INT_ENABLE_DISABLE_ONLY));
975#else
976 mode = (enum gpio_int_mode)(flags & (GPIO_INT_EDGE | GPIO_INT_DISABLE | GPIO_INT_ENABLE));
977#endif /* CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT */
978
979 ret = api->pin_interrupt_configure(port, pin, mode, trig);
980 SYS_PORT_TRACING_FUNC_EXIT(gpio_pin, interrupt_configure, port, pin, ret);
981 return ret;
982}
983
1001static inline int gpio_pin_interrupt_configure_dt(const struct gpio_dt_spec *spec,
1003{
1004 return gpio_pin_interrupt_configure(spec->port, spec->pin,
1005 flags | (spec->dt_flags & GPIO_INT_WAKEUP));
1006}
1007
1023__syscall int gpio_pin_configure(const struct device *port,
1024 gpio_pin_t pin,
1026
1027static inline int z_impl_gpio_pin_configure(const struct device *port,
1028 gpio_pin_t pin,
1030{
1031 const struct gpio_driver_api *api = DEVICE_API_GET(gpio, port);
1032 __unused const struct gpio_driver_config *const cfg =
1033 (const struct gpio_driver_config *)port->config;
1034 struct gpio_driver_data *data =
1035 (struct gpio_driver_data *)port->data;
1036 int ret;
1037
1038 SYS_PORT_TRACING_FUNC_ENTER(gpio_pin, configure, port, pin, flags);
1039
1040 __ASSERT((flags & GPIO_INT_MASK) == 0,
1041 "Interrupt flags are not supported");
1042
1043 __ASSERT((flags & (GPIO_PULL_UP | GPIO_PULL_DOWN)) !=
1045 "Pull Up and Pull Down should not be enabled simultaneously");
1046
1047 __ASSERT(!((flags & GPIO_INPUT) && !(flags & GPIO_OUTPUT) && (flags & GPIO_SINGLE_ENDED)),
1048 "Input cannot be enabled for 'Open Drain', 'Open Source' modes without Output");
1049
1050 __ASSERT_NO_MSG((flags & GPIO_SINGLE_ENDED) != 0 ||
1051 (flags & GPIO_LINE_OPEN_DRAIN) == 0);
1052
1053 __ASSERT((flags & (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH)) == 0
1054 || (flags & GPIO_OUTPUT) != 0,
1055 "Output needs to be enabled to be initialized low or high");
1056
1057 __ASSERT((flags & (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH))
1058 != (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH),
1059 "Output cannot be initialized low and high");
1060
1061 if (((flags & GPIO_OUTPUT_INIT_LOGICAL) != 0)
1062 && ((flags & (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH)) != 0)
1063 && ((flags & GPIO_ACTIVE_LOW) != 0)) {
1064 flags ^= GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH;
1065 }
1066
1067 flags &= ~GPIO_OUTPUT_INIT_LOGICAL;
1068
1069 __ASSERT(gpio_port_pin_is_supported(cfg->port_pin_mask, pin), "Unsupported pin");
1070
1071 /*
1072 * pin is passed on to the driver as-is, where it is commonly used as an
1073 * array index, so it must be range checked even when assertions are
1074 * compiled out.
1075 */
1076 if (pin >= GPIO_MAX_PINS_PER_PORT) {
1077 SYS_PORT_TRACING_FUNC_EXIT(gpio_pin, configure, port, pin, -EINVAL);
1078 return -EINVAL;
1079 }
1080
1081 if ((flags & GPIO_ACTIVE_LOW) != 0) {
1082 data->invert |= (gpio_port_pins_t)BIT(pin);
1083 } else {
1084 data->invert &= ~(gpio_port_pins_t)BIT(pin);
1085 }
1086
1087 ret = api->pin_configure(port, pin, flags);
1088 SYS_PORT_TRACING_FUNC_EXIT(gpio_pin, configure, port, pin, ret);
1089 return ret;
1090}
1091
1103static inline int gpio_pin_configure_dt(const struct gpio_dt_spec *spec,
1104 gpio_flags_t extra_flags)
1105{
1106 return gpio_pin_configure(spec->port,
1107 spec->pin,
1108 spec->dt_flags | extra_flags);
1109}
1110
1129__syscall int gpio_port_get_direction(const struct device *port, gpio_port_pins_t map,
1130 gpio_port_pins_t *inputs, gpio_port_pins_t *outputs);
1131
1132#ifdef CONFIG_GPIO_GET_DIRECTION
1133static inline int z_impl_gpio_port_get_direction(const struct device *port, gpio_port_pins_t map,
1134 gpio_port_pins_t *inputs,
1135 gpio_port_pins_t *outputs)
1136{
1137 const struct gpio_driver_api *api = DEVICE_API_GET(gpio, port);
1138 int ret;
1139
1140 SYS_PORT_TRACING_FUNC_ENTER(gpio_port, get_direction, port, map, inputs, outputs);
1141
1142 if (api->port_get_direction == NULL) {
1143 SYS_PORT_TRACING_FUNC_EXIT(gpio_port, get_direction, port, -ENOSYS);
1144 return -ENOSYS;
1145 }
1146
1147 ret = api->port_get_direction(port, map, inputs, outputs);
1148 SYS_PORT_TRACING_FUNC_EXIT(gpio_port, get_direction, port, ret);
1149 return ret;
1150}
1151#endif /* CONFIG_GPIO_GET_DIRECTION */
1152
1165static inline int gpio_pin_is_input(const struct device *port, gpio_pin_t pin)
1166{
1167 int rv;
1168 gpio_port_pins_t pins;
1169 __unused const struct gpio_driver_config *cfg =
1170 (const struct gpio_driver_config *)port->config;
1171
1172 __ASSERT(gpio_port_pin_is_supported(cfg->port_pin_mask, pin), "Unsupported pin");
1173
1174 rv = gpio_port_get_direction(port, BIT(pin), &pins, NULL);
1175 if (rv < 0) {
1176 return rv;
1177 }
1178
1179 return (int)!!((gpio_port_pins_t)BIT(pin) & pins);
1180}
1181
1193static inline int gpio_pin_is_input_dt(const struct gpio_dt_spec *spec)
1194{
1195 return gpio_pin_is_input(spec->port, spec->pin);
1196}
1197
1210static inline int gpio_pin_is_output(const struct device *port, gpio_pin_t pin)
1211{
1212 int rv;
1213 gpio_port_pins_t pins;
1214 __unused const struct gpio_driver_config *cfg =
1215 (const struct gpio_driver_config *)port->config;
1216
1217 __ASSERT(gpio_port_pin_is_supported(cfg->port_pin_mask, pin), "Unsupported pin");
1218
1219 rv = gpio_port_get_direction(port, BIT(pin), NULL, &pins);
1220 if (rv < 0) {
1221 return rv;
1222 }
1223
1224 return (int)!!((gpio_port_pins_t)BIT(pin) & pins);
1225}
1226
1238static inline int gpio_pin_is_output_dt(const struct gpio_dt_spec *spec)
1239{
1240 return gpio_pin_is_output(spec->port, spec->pin);
1241}
1242
1258__syscall int gpio_pin_get_config(const struct device *port, gpio_pin_t pin,
1260
1261#ifdef CONFIG_GPIO_GET_CONFIG
1262static inline int z_impl_gpio_pin_get_config(const struct device *port,
1263 gpio_pin_t pin,
1265{
1266 const struct gpio_driver_api *api = DEVICE_API_GET(gpio, port);
1267 int ret;
1268
1269 SYS_PORT_TRACING_FUNC_ENTER(gpio_pin, get_config, port, pin, *flags);
1270
1271 if (api->pin_get_config == NULL) {
1272 SYS_PORT_TRACING_FUNC_EXIT(gpio_pin, get_config, port, pin, -ENOSYS);
1273 return -ENOSYS;
1274 }
1275
1276 /* See the note in z_impl_gpio_pin_configure(). */
1277 if (pin >= GPIO_MAX_PINS_PER_PORT) {
1278 SYS_PORT_TRACING_FUNC_EXIT(gpio_pin, get_config, port, pin, -EINVAL);
1279 return -EINVAL;
1280 }
1281
1282 ret = api->pin_get_config(port, pin, flags);
1283 SYS_PORT_TRACING_FUNC_EXIT(gpio_pin, get_config, port, pin, ret);
1284 return ret;
1285}
1286#endif
1287
1300static inline int gpio_pin_get_config_dt(const struct gpio_dt_spec *spec,
1302{
1303 return gpio_pin_get_config(spec->port, spec->pin, flags);
1304}
1305
1323__syscall int gpio_port_get_raw(const struct device *port,
1324 gpio_port_value_t *value);
1325
1326static inline int z_impl_gpio_port_get_raw(const struct device *port, gpio_port_value_t *value)
1327{
1328 const struct gpio_driver_api *api = DEVICE_API_GET(gpio, port);
1329 int ret;
1330
1331 SYS_PORT_TRACING_FUNC_ENTER(gpio_port, get_raw, port, value);
1332
1333 ret = api->port_get_raw(port, value);
1334 SYS_PORT_TRACING_FUNC_EXIT(gpio_port, get_raw, port, ret);
1335 return ret;
1336}
1337
1356__syscall int gpio_port_get(const struct device *port,
1357 gpio_port_value_t *value);
1358
1359static inline int z_impl_gpio_port_get(const struct device *port,
1360 gpio_port_value_t *value)
1361{
1362 const struct gpio_driver_data *const data =
1363 (const struct gpio_driver_data *)port->data;
1364 int ret;
1365
1366 ret = z_impl_gpio_port_get_raw(port, value);
1367 if (ret == 0) {
1368 *value ^= data->invert;
1369 }
1370
1371 return ret;
1372}
1373
1391__syscall int gpio_port_set_masked_raw(const struct device *port,
1392 gpio_port_pins_t mask,
1393 gpio_port_value_t value);
1394
1395static inline int z_impl_gpio_port_set_masked_raw(const struct device *port,
1396 gpio_port_pins_t mask,
1397 gpio_port_value_t value)
1398{
1399 const struct gpio_driver_api *api = DEVICE_API_GET(gpio, port);
1400 int ret;
1401
1402 SYS_PORT_TRACING_FUNC_ENTER(gpio_port, set_masked_raw, port, mask, value);
1403
1404 ret = api->port_set_masked_raw(port, mask, value);
1405 SYS_PORT_TRACING_FUNC_EXIT(gpio_port, set_masked_raw, port, ret);
1406 return ret;
1407}
1408
1429__syscall int gpio_port_set_masked(const struct device *port,
1430 gpio_port_pins_t mask,
1431 gpio_port_value_t value);
1432
1433static inline int z_impl_gpio_port_set_masked(const struct device *port,
1434 gpio_port_pins_t mask,
1435 gpio_port_value_t value)
1436{
1437 const struct gpio_driver_data *const data =
1438 (const struct gpio_driver_data *)port->data;
1439
1440 value ^= data->invert;
1441
1442 return z_impl_gpio_port_set_masked_raw(port, mask, value);
1443}
1444
1455__syscall int gpio_port_set_bits_raw(const struct device *port,
1456 gpio_port_pins_t pins);
1457
1458static inline int z_impl_gpio_port_set_bits_raw(const struct device *port,
1459 gpio_port_pins_t pins)
1460{
1461 const struct gpio_driver_api *api = DEVICE_API_GET(gpio, port);
1462 int ret;
1463
1464 SYS_PORT_TRACING_FUNC_ENTER(gpio_port, set_bits_raw, port, pins);
1465
1466 ret = api->port_set_bits_raw(port, pins);
1467 SYS_PORT_TRACING_FUNC_EXIT(gpio_port, set_bits_raw, port, ret);
1468 return ret;
1469}
1470
1481__syscall int gpio_port_set_bits(const struct device *port,
1482 gpio_port_pins_t pins);
1483
1484static inline int z_impl_gpio_port_set_bits(const struct device *port,
1485 gpio_port_pins_t pins)
1486{
1487 return z_impl_gpio_port_set_masked(port, pins, pins);
1488}
1489
1500__syscall int gpio_port_clear_bits_raw(const struct device *port,
1501 gpio_port_pins_t pins);
1502
1503static inline int z_impl_gpio_port_clear_bits_raw(const struct device *port,
1504 gpio_port_pins_t pins)
1505{
1506 const struct gpio_driver_api *api = DEVICE_API_GET(gpio, port);
1507 int ret;
1508
1509 SYS_PORT_TRACING_FUNC_ENTER(gpio_port, clear_bits_raw, port, pins);
1510
1511 ret = api->port_clear_bits_raw(port, pins);
1512 SYS_PORT_TRACING_FUNC_EXIT(gpio_port, clear_bits_raw, port, ret);
1513 return ret;
1514}
1515
1526__syscall int gpio_port_clear_bits(const struct device *port,
1527 gpio_port_pins_t pins);
1528
1529static inline int z_impl_gpio_port_clear_bits(const struct device *port,
1530 gpio_port_pins_t pins)
1531{
1532 return z_impl_gpio_port_set_masked(port, pins, 0);
1533}
1534
1545__syscall int gpio_port_toggle_bits(const struct device *port,
1546 gpio_port_pins_t pins);
1547
1548static inline int z_impl_gpio_port_toggle_bits(const struct device *port,
1549 gpio_port_pins_t pins)
1550{
1551 const struct gpio_driver_api *api = DEVICE_API_GET(gpio, port);
1552 int ret;
1553
1554 SYS_PORT_TRACING_FUNC_ENTER(gpio_port, toggle_bits, port, pins);
1555
1556 ret = api->port_toggle_bits(port, pins);
1557 SYS_PORT_TRACING_FUNC_EXIT(gpio_port, toggle_bits, port, ret);
1558 return ret;
1559}
1560
1572__syscall int gpio_port_set_clr_bits_raw(const struct device *port,
1573 gpio_port_pins_t set_pins,
1574 gpio_port_pins_t clear_pins);
1575
1576static inline int z_impl_gpio_port_set_clr_bits_raw(const struct device *port,
1577 gpio_port_pins_t set_pins,
1578 gpio_port_pins_t clear_pins)
1579{
1580 __ASSERT((set_pins & clear_pins) == 0, "Set and Clear pins overlap");
1581
1582 return z_impl_gpio_port_set_masked_raw(port, set_pins | clear_pins, set_pins);
1583}
1584
1596__syscall int gpio_port_set_clr_bits(const struct device *port,
1597 gpio_port_pins_t set_pins,
1598 gpio_port_pins_t clear_pins);
1599
1600static inline int z_impl_gpio_port_set_clr_bits(const struct device *port,
1601 gpio_port_pins_t set_pins,
1602 gpio_port_pins_t clear_pins)
1603{
1604 __ASSERT((set_pins & clear_pins) == 0, "Set and Clear pins overlap");
1605
1606 return z_impl_gpio_port_set_masked(port, set_pins | clear_pins, set_pins);
1607}
1608
1624__syscall int gpio_pin_get_raw(const struct device *port, gpio_pin_t pin);
1625
1626static inline int z_impl_gpio_pin_get_raw(const struct device *port, gpio_pin_t pin)
1627{
1628 __unused const struct gpio_driver_config *const cfg =
1629 (const struct gpio_driver_config *)port->config;
1630 gpio_port_value_t value;
1631 int ret;
1632
1633 __ASSERT(gpio_port_pin_is_supported(cfg->port_pin_mask, pin), "Unsupported pin");
1634
1635 ret = z_impl_gpio_port_get_raw(port, &value);
1636 if (ret == 0) {
1637 ret = (value & (gpio_port_pins_t)BIT(pin)) != 0 ? 1 : 0;
1638 }
1639
1640 return ret;
1641}
1642
1662__syscall int gpio_pin_get(const struct device *port, gpio_pin_t pin);
1663
1664static inline int z_impl_gpio_pin_get(const struct device *port, gpio_pin_t pin)
1665{
1666 __unused const struct gpio_driver_config *const cfg =
1667 (const struct gpio_driver_config *)port->config;
1668 gpio_port_value_t value;
1669 int ret;
1670
1671 __ASSERT(gpio_port_pin_is_supported(cfg->port_pin_mask, pin), "Unsupported pin");
1672
1673 ret = z_impl_gpio_port_get(port, &value);
1674 if (ret == 0) {
1675 ret = (value & (gpio_port_pins_t)BIT(pin)) != 0 ? 1 : 0;
1676 }
1677
1678 return ret;
1679}
1680
1691static inline int gpio_pin_get_dt(const struct gpio_dt_spec *spec)
1692{
1693 return gpio_pin_get(spec->port, spec->pin);
1694}
1695
1711__syscall int gpio_pin_set_raw(const struct device *port, gpio_pin_t pin, int value);
1712
1713static inline int z_impl_gpio_pin_set_raw(const struct device *port, gpio_pin_t pin,
1714 int value)
1715{
1716 __unused const struct gpio_driver_config *const cfg =
1717 (const struct gpio_driver_config *)port->config;
1718 int ret;
1719
1720 __ASSERT(gpio_port_pin_is_supported(cfg->port_pin_mask, pin), "Unsupported pin");
1721
1722 if (value != 0) {
1723 ret = z_impl_gpio_port_set_bits_raw(port, (gpio_port_pins_t)BIT(pin));
1724 } else {
1725 ret = z_impl_gpio_port_clear_bits_raw(port, (gpio_port_pins_t)BIT(pin));
1726 }
1727
1728 return ret;
1729}
1730
1752__syscall int gpio_pin_set(const struct device *port, gpio_pin_t pin, int value);
1753
1754static inline int z_impl_gpio_pin_set(const struct device *port, gpio_pin_t pin,
1755 int value)
1756{
1757 __unused const struct gpio_driver_config *const cfg =
1758 (const struct gpio_driver_config *)port->config;
1759 const struct gpio_driver_data *const data =
1760 (const struct gpio_driver_data *)port->data;
1761
1762 __ASSERT(gpio_port_pin_is_supported(cfg->port_pin_mask, pin), "Unsupported pin");
1763
1764 if (data->invert & (gpio_port_pins_t)BIT(pin)) {
1765 value = (value != 0) ? 0 : 1;
1766 }
1767
1768 return z_impl_gpio_pin_set_raw(port, pin, value);
1769}
1770
1782static inline int gpio_pin_set_dt(const struct gpio_dt_spec *spec, int value)
1783{
1784 return gpio_pin_set(spec->port, spec->pin, value);
1785}
1786
1797__syscall int gpio_pin_toggle(const struct device *port, gpio_pin_t pin);
1798
1799static inline int z_impl_gpio_pin_toggle(const struct device *port, gpio_pin_t pin)
1800{
1801 __unused const struct gpio_driver_config *const cfg =
1802 (const struct gpio_driver_config *)port->config;
1803
1804 __ASSERT(gpio_port_pin_is_supported(cfg->port_pin_mask, pin), "Unsupported pin");
1805
1806 return z_impl_gpio_port_toggle_bits(port, (gpio_port_pins_t)BIT(pin));
1807}
1808
1819static inline int gpio_pin_toggle_dt(const struct gpio_dt_spec *spec)
1820{
1821 return gpio_pin_toggle(spec->port, spec->pin);
1822}
1823
1830static inline void gpio_init_callback(struct gpio_callback *callback,
1832 gpio_port_pins_t pin_mask)
1833{
1834 SYS_PORT_TRACING_FUNC_ENTER(gpio, init_callback, callback, handler, pin_mask);
1835
1836 __ASSERT(callback, "Callback pointer should not be NULL");
1837 __ASSERT(handler, "Callback handler pointer should not be NULL");
1838
1839 callback->handler = handler;
1840 callback->pin_mask = pin_mask;
1841
1842 SYS_PORT_TRACING_FUNC_EXIT(gpio, init_callback, callback);
1843}
1844
1858static inline int gpio_add_callback(const struct device *port,
1859 struct gpio_callback *callback)
1860{
1861 const struct gpio_driver_api *api = DEVICE_API_GET(gpio, port);
1862 int ret;
1863
1864 SYS_PORT_TRACING_FUNC_ENTER(gpio, add_callback, port, callback);
1865
1866 if (api->manage_callback == NULL) {
1867 SYS_PORT_TRACING_FUNC_EXIT(gpio, add_callback, port, -ENOSYS);
1868 return -ENOSYS;
1869 }
1870
1871 ret = api->manage_callback(port, callback, true);
1872 SYS_PORT_TRACING_FUNC_EXIT(gpio, add_callback, port, ret);
1873 return ret;
1874}
1875
1887static inline int gpio_add_callback_dt(const struct gpio_dt_spec *spec,
1888 struct gpio_callback *callback)
1889{
1890 return gpio_add_callback(spec->port, callback);
1891}
1892
1910static inline int gpio_remove_callback(const struct device *port,
1911 struct gpio_callback *callback)
1912{
1913 const struct gpio_driver_api *api = DEVICE_API_GET(gpio, port);
1914 int ret;
1915
1916 SYS_PORT_TRACING_FUNC_ENTER(gpio, remove_callback, port, callback);
1917
1918 if (api->manage_callback == NULL) {
1919 SYS_PORT_TRACING_FUNC_EXIT(gpio, remove_callback, port, -ENOSYS);
1920 return -ENOSYS;
1921 }
1922
1923 ret = api->manage_callback(port, callback, false);
1924 SYS_PORT_TRACING_FUNC_EXIT(gpio, remove_callback, port, ret);
1925 return ret;
1926}
1927
1939static inline int gpio_remove_callback_dt(const struct gpio_dt_spec *spec,
1940 struct gpio_callback *callback)
1941{
1942 return gpio_remove_callback(spec->port, callback);
1943}
1944
1959__syscall int gpio_get_pending_int(const struct device *dev);
1960
1961static inline int z_impl_gpio_get_pending_int(const struct device *dev)
1962{
1963 const struct gpio_driver_api *api = DEVICE_API_GET(gpio, dev);
1964 int ret;
1965
1966 SYS_PORT_TRACING_FUNC_ENTER(gpio, get_pending_int, dev);
1967
1968 if (api->get_pending_int == NULL) {
1969 SYS_PORT_TRACING_FUNC_EXIT(gpio, get_pending_int, dev, -ENOSYS);
1970 return -ENOSYS;
1971 }
1972
1973 ret = api->get_pending_int(dev);
1974 SYS_PORT_TRACING_FUNC_EXIT(gpio, get_pending_int, dev, ret);
1975 return ret;
1976}
1977
1981
1982#ifdef __cplusplus
1983}
1984#endif
1985
1986#include <zephyr/syscalls/gpio.h>
1987
1988#endif /* ZEPHYR_INCLUDE_DRIVERS_GPIO_H_ */
#define DEVICE_API_GET(_class, _dev)
Expands to the pointer of a device's API for a given class.
Definition device.h:1425
System error numbers.
bool device_is_ready(const struct device *dev)
Verify that a device is ready for use.
static int gpio_add_callback(const struct device *port, struct gpio_callback *callback)
Add an application callback.
Definition gpio.h:1858
int gpio_pin_set_raw(const struct device *port, gpio_pin_t pin, int value)
Set physical level of an output pin.
int gpio_port_set_masked(const struct device *port, gpio_port_pins_t mask, gpio_port_value_t value)
Set logical level of output pins in a port.
#define GPIO_OUTPUT
Enables pin as output, no change to the output state.
Definition gpio.h:58
int gpio_pin_get_config(const struct device *port, gpio_pin_t pin, gpio_flags_t *flags)
Get a configuration of a single pin.
#define GPIO_MAX_PINS_PER_PORT
Maximum number of pins that are supported by gpio_port_pins_t.
Definition gpio.h:691
static int gpio_pin_is_input(const struct device *port, gpio_pin_t pin)
Check if pin is configured for input.
Definition gpio.h:1165
int gpio_port_set_bits_raw(const struct device *port, gpio_port_pins_t pins)
Set physical level of selected output pins to high.
int gpio_port_set_clr_bits_raw(const struct device *port, gpio_port_pins_t set_pins, gpio_port_pins_t clear_pins)
Set physical level of selected output pins.
static int gpio_pin_is_output_dt(const struct gpio_dt_spec *spec)
Check if a single pin from gpio_dt_spec is configured for output.
Definition gpio.h:1238
static int gpio_pin_interrupt_configure_dt(const struct gpio_dt_spec *spec, gpio_flags_t flags)
Configure pin interrupts from a gpio_dt_spec.
Definition gpio.h:1001
static int gpio_remove_callback_dt(const struct gpio_dt_spec *spec, struct gpio_callback *callback)
Remove an application callback.
Definition gpio.h:1939
static int gpio_pin_toggle_dt(const struct gpio_dt_spec *spec)
Toggle pin level from a gpio_dt_spec.
Definition gpio.h:1819
uint8_t gpio_pin_t
Provides a type to hold a GPIO pin index.
Definition gpio.h:262
static int gpio_pin_is_output(const struct device *port, gpio_pin_t pin)
Check if pin is configured for output.
Definition gpio.h:1210
int gpio_get_pending_int(const struct device *dev)
Function to get pending interrupts.
static int gpio_pin_configure_dt(const struct gpio_dt_spec *spec, gpio_flags_t extra_flags)
Configure a single pin from a gpio_dt_spec and some extra flags.
Definition gpio.h:1103
int gpio_port_set_clr_bits(const struct device *port, gpio_port_pins_t set_pins, gpio_port_pins_t clear_pins)
Set logical level of selected output pins.
int gpio_pin_get(const struct device *port, gpio_pin_t pin)
Get logical level of an input pin.
static int gpio_pin_set_dt(const struct gpio_dt_spec *spec, int value)
Set logical level of a output pin from a gpio_dt_spec.
Definition gpio.h:1782
static int gpio_add_callback_dt(const struct gpio_dt_spec *spec, struct gpio_callback *callback)
Add an application callback.
Definition gpio.h:1887
uint32_t gpio_flags_t
Provides a type to hold GPIO configuration flags.
Definition gpio.h:282
#define GPIO_ACTIVE_LOW
GPIO pin is active (has logical value '1') in low state.
Definition gpio.h:24
int gpio_pin_get_raw(const struct device *port, gpio_pin_t pin)
Get physical level of an input pin.
#define GPIO_INT_WAKEUP
Configures GPIO interrupt to wakeup the system from low power mode.
Definition gpio.h:83
static void gpio_init_callback(struct gpio_callback *callback, gpio_callback_handler_t handler, gpio_port_pins_t pin_mask)
Helper to initialize a struct gpio_callback properly.
Definition gpio.h:1830
static int gpio_pin_is_input_dt(const struct gpio_dt_spec *spec)
Check if a single pin from gpio_dt_spec is configured for input.
Definition gpio.h:1193
#define GPIO_INPUT
Enables pin as input.
Definition gpio.h:55
int gpio_port_get(const struct device *port, gpio_port_value_t *value)
Get logical level of all input pins in a port.
uint32_t gpio_port_pins_t
Identifies a set of pins associated with a port.
Definition gpio.h:241
static int gpio_pin_get_config_dt(const struct gpio_dt_spec *spec, gpio_flags_t *flags)
Get a configuration of a single pin from a gpio_dt_spec.
Definition gpio.h:1300
int gpio_port_toggle_bits(const struct device *port, gpio_port_pins_t pins)
Toggle level of selected output pins.
#define GPIO_INT_DISABLE
Disables GPIO pin interrupt.
Definition gpio.h:108
int gpio_port_clear_bits(const struct device *port, gpio_port_pins_t pins)
Set logical level of selected output pins to inactive.
int gpio_pin_interrupt_configure(const struct device *port, gpio_pin_t pin, gpio_flags_t flags)
Configure pin interrupt.
int gpio_port_clear_bits_raw(const struct device *port, gpio_port_pins_t pins)
Set physical level of selected output pins to low.
int gpio_port_set_masked_raw(const struct device *port, gpio_port_pins_t mask, gpio_port_value_t value)
Set physical level of output pins in a port.
int gpio_pin_toggle(const struct device *port, gpio_pin_t pin)
Toggle pin level.
#define GPIO_PULL_UP
Enables GPIO pin pull-up.
Definition gpio.h:73
static int gpio_pin_get_dt(const struct gpio_dt_spec *spec)
Get logical level of an input pin from a gpio_dt_spec.
Definition gpio.h:1691
static bool gpio_is_ready_dt(const struct gpio_dt_spec *spec)
Validate that GPIO port is ready.
Definition gpio.h:877
static bool gpio_port_pin_is_supported(gpio_port_pins_t port_pin_mask, gpio_pin_t pin)
Check whether a pin is in range and supported by a GPIO controller.
Definition gpio.h:708
uint32_t gpio_port_value_t
Provides values for a set of pins associated with a port.
Definition gpio.h:254
static int gpio_remove_callback(const struct device *port, struct gpio_callback *callback)
Remove an application callback.
Definition gpio.h:1910
int gpio_port_get_direction(const struct device *port, gpio_port_pins_t map, gpio_port_pins_t *inputs, gpio_port_pins_t *outputs)
Get direction of select pins in a port.
uint16_t gpio_dt_flags_t
Provides a type to hold GPIO devicetree flags.
Definition gpio.h:274
int gpio_pin_set(const struct device *port, gpio_pin_t pin, int value)
Set logical level of an output pin.
#define GPIO_PULL_DOWN
Enable GPIO pin pull-down.
Definition gpio.h:76
int gpio_port_get_raw(const struct device *port, gpio_port_value_t *value)
Get physical level of all input pins in a port.
int gpio_port_set_bits(const struct device *port, gpio_port_pins_t pins)
Set logical level of selected output pins to active.
int gpio_pin_configure(const struct device *port, gpio_pin_t pin, gpio_flags_t flags)
Configure a single pin.
void(* gpio_callback_handler_t)(const struct device *port, struct gpio_callback *cb, gpio_port_pins_t pins)
Define the application callback handler function signature.
Definition gpio.h:757
struct _snode sys_snode_t
Single-linked list node structure.
Definition slist.h:42
#define SYS_PORT_TRACING_FUNC_ENTER(type, func,...)
Tracing macro for the entry into a function that might or might not return a value.
Definition tracing_macros.h:257
#define SYS_PORT_TRACING_FUNC_EXIT(type, func,...)
Tracing macro for when a function ends its execution.
Definition tracing_macros.h:283
#define BIT(n)
Unsigned integer with bit position n set (signed in assembly language).
Definition util_macro.h:44
#define EINVAL
Invalid argument.
Definition errno.h:61
#define ENOSYS
Function not implemented.
Definition errno.h:83
flags
Definition parser.h:97
Header file for the single-linked list API.
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINT8_TYPE__ uint8_t
Definition stdint.h:88
__UINT16_TYPE__ uint16_t
Definition stdint.h:89
Runtime device structure (in ROM) per driver instance.
Definition device.h:513
void * data
Address of the device instance private data.
Definition device.h:523
const void * config
Address of device instance config information.
Definition device.h:517
GPIO callback structure.
Definition gpio.h:771
sys_snode_t node
This is meant to be used in the driver and the user should not mess with it (see drivers/gpio/gpio_ut...
Definition gpio.h:775
gpio_port_pins_t pin_mask
A mask of pins the callback is interested in, if 0 the callback will never be called.
Definition gpio.h:786
gpio_callback_handler_t handler
Actual callback function being called when relevant.
Definition gpio.h:778
This structure is common to all GPIO drivers and is expected to be the first element in the object po...
Definition gpio.h:722
gpio_port_pins_t port_pin_mask
Mask identifying pins supported by the controller.
Definition gpio.h:728
This structure is common to all GPIO drivers and is expected to be the first element in the driver's ...
Definition gpio.h:735
gpio_port_pins_t invert
Mask identifying pins that are configured as active low.
Definition gpio.h:741
Container for GPIO pin information specified in devicetree.
Definition gpio.h:296
const struct device * port
GPIO device controlling the pin.
Definition gpio.h:298
gpio_pin_t pin
The pin's number on the device.
Definition gpio.h:300
gpio_dt_flags_t dt_flags
The pin's configuration flags as specified in devicetree.
Definition gpio.h:302
Main header file for tracing subsystem API.