nrf_axon_nn_op_extension_base1_args_s Struct Reference

Structure compiled into the command buffer then passed to some CPU op extension functions. More...

#include <nrf_axon_nn_op_extensions.h>

Data Fields
struct {
int8_t *   input
int8_t *   output
}	ptr_args
struct {
union {
NRF_AXON_PLATFORM_BITWIDTH_UNSIGNED_TYPE   spacer0
uint32_t   output_multiplier
}
union {
NRF_AXON_PLATFORM_BITWIDTH_UNSIGNED_TYPE   spacer1
struct {
uint16_t   height
uint16_t   width
}
}
union {
NRF_AXON_PLATFORM_BITWIDTH_UNSIGNED_TYPE   spacer2
struct {
uint16_t   channel_cnt
uint8_t   output_rounding
int8_t   output_zeropoint
}
}
union {
NRF_AXON_PLATFORM_BITWIDTH_UNSIGNED_TYPE   spacer3
struct {
uint8_t   output_bytewidth
bool   quantization_enabled
bool   input_is_packed
}
}
}	remaining_args

Detailed Description

Structure compiled into the command buffer then passed to some CPU op extension functions.

Note

To maintain compatibility with simulator builds, the parameters are in elements of NRF_AXON_PLATFORM_BITWIDTH_UNSIGNED_TYPE. This is 64bits on the simulator, 32bits on Nordic MCUs. By organizing this as a series of unions, the upper 32bits of the parameters remain 0s unless the argument is a pointer.

Op Extension Base 1 profile arguments. The following conditions must be met for an op extension to use this structure to pass its parameters. (If the conditions aren't met, a new structure needs to be defined.)

• A single input vector.
• input and output dimensions are the same.
• output is packed (rows are padded to 4byte boundaries)
• input/output data storage is data[channel_cnt][height][ceil(width,4)]
• input bytewidth is 4 (32bit), implicitly q11.12
• output bytewidth depends on quantization_enabled.

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The documentation for this struct was generated from the following file:

• include/drivers/axon/nrf_axon_nn_op_extensions.h