Structure for the UARTE configuration. More...

#include <nrfx_uarte.h>

Data Fields
uint32_t	txd_pin
	TXD pin number.

uint32_t	rxd_pin
	RXD pin number.

uint32_t	rts_pin
	RTS pin number.

uint32_t	cts_pin
	CTS pin number.

void *	p_context
	Context passed to interrupt handler.

nrfy_uarte_buffer_t	tx_cache
	TX cache buffer.

nrfy_uarte_buffer_t	rx_cache
	RX cache buffer.

nrfx_uarte_rx_cache_t *	p_rx_cache_scratch

nrf_uarte_baudrate_t	baudrate
	Baud rate.

nrf_uarte_config_t	config
	Peripheral configuration.

bool	skip_psel_cfg
	Skip pin selection configuration.

bool	skip_gpio_cfg
	Skip GPIO configuration of pins.

bool	tx_stop_on_end
	Indicates that the STOPTX task is PPIed with ENDTX event.

uint8_t	interrupt_priority
	Interrupt priority.

Detailed Description

Structure for the UARTE configuration.

Field Documentation

◆ p_rx_cache_scratch

nrfx_uarte_rx_cache_t* nrfx_uarte_config_t::p_rx_cache_scratch

Static RAM memory area used for receiving data through RX cache buffer. Can be NULL if RX caching is not used.

◆ rx_cache

nrfy_uarte_buffer_t nrfx_uarte_config_t::rx_cache

RX cache buffer.

A buffer to store flushed RX data. The buffer is also used when the input RX buffer is from an address space that cannot be handled by the DMA. A buffer size must be at least 5 bytes which is the size of the HW FIFO, and should be bigger if expected to be used as cache when an input RX buffer cannot be used for the DMA. If not provided, then bytes left in the FIFO after a receiver is disabled will be discarded, and reception will not be performed if the input RX buffer cannot be used by the DMA.

◆ skip_gpio_cfg

bool nrfx_uarte_config_t::skip_gpio_cfg

Skip GPIO configuration of pins.

When set to true, the driver does not modify any GPIO parameters of the used pins. Those parameters are supposed to be configured externally before the driver is initialized.

◆ skip_psel_cfg

bool nrfx_uarte_config_t::skip_psel_cfg

Skip pin selection configuration.

When set to true, the driver does not modify pin select registers in the peripheral. Those registers are supposed to be set up externally before the driver is initialized.

Note: When both GPIO configuration and pin selection are to be skipped, the structure fields that specify pins can be omitted, as they are ignored anyway.

◆ tx_stop_on_end

bool nrfx_uarte_config_t::tx_stop_on_end

Indicates that the STOPTX task is PPIed with ENDTX event.

If SHORT exists, then it will be used by the driver, otherwise (D)PPI connection must be setup by the user.

The documentation for this struct was generated from the following file:

drivers/include/nrfx_uarte.h