QSPI_CORE_CORE_CTRLR0_TMOD_TXANDRX

#define QSPI_CORE_CORE_CTRLR0_TMOD_TXANDRX    (0x0UL)

Transmit & Receive; Not Applicable in enhanced SPI operating mode or when SQSPIC_HAS_TX_RX_EN is set to 0