rx_bypass_pin_config

mpsl_fem_gpiote_pin_config_t mpsl_fem_simple_gpio_interface_config_t::rx_bypass_pin_config

RX bypass pin configuration.

GPIO used to select the Front End Module RX bypass path as opposed to the LNA path. Works together with fem_config.bypass_gain_db.

RX bypass is active only when fem_config.bypass_gain_db is not 0 and mpsl_fem_gpiote_pin_config_t::enable is true. On nRF52 series (PPI) RX bypass is not supported.

When enabled, mpsl_fem_lna_is_configured reports fem_config.bypass_gain_db instead of fem_config.lna_gain_db, and LNA timing drives this pin in parallel with lna_pin_config on activate and deactivate.

Same configuration as pa_pin_config: On some devices the RX bypass select shares the PA control line. Set this field equal to pa_pin_config (same GPIO, active_high, enable, and gpiote_ch_id). The driver aliases RX bypass GPIOTE tasks to the PA tasks.

Same configuration as tx_bypass_pin_config: When one GPIO selects bypass for both TX and RX, set this field equal to tx_bypass_pin_config. The driver aliases RX bypass tasks to the TX bypass tasks (after TX bypass/LNA aliasing is applied).

Dedicated bypass GPIO: Use a different GPIO and GPIOTE channel than pa_pin_config, tx_bypass_pin_config, and lna_pin_config. The driver toggles that line together with lna_pin_config for every reception.

Same GPIO as lna_pin_config: Not supported.