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Zephyr API 4.4.99
A Scalable Open Source RTOS
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Go to the source code of this file.
Macros | |
| #define | SIWX91X_CLK_ULP_UART 0 |
| #define | SIWX91X_CLK_ULP_I2C 1 |
| #define | SIWX91X_CLK_ULP_DMA 2 |
| #define | SIWX91X_CLK_UART0 3 |
| #define | SIWX91X_CLK_UART1 4 |
| #define | SIWX91X_CLK_I2C0 5 |
| #define | SIWX91X_CLK_I2C1 6 |
| #define | SIWX91X_CLK_DMA0 7 |
| #define | SIWX91X_CLK_WATCHDOG 8 |
| #define | SIWX91X_CLK_PWM 9 |
| #define | SIWX91X_CLK_GSPI 10 |
| #define | SIWX91X_CLK_QSPI 11 |
| #define | SIWX91X_CLK_RTC 12 |
| #define | SIWX91X_CLK_I2S0 13 |
| #define | SIWX91X_CLK_STATIC_I2S0 14 |
| #define | SIWX91X_CLK_ULP_I2S 15 |
| #define | SIWX91X_CLK_STATIC_ULP_I2S 16 |
| #define | SIWX91X_CLK_ADC 17 |
| #define | SIWX91X_CLK_GPDMA0 18 |
| #define | SIWX91X_CLK_RNG 19 |
| #define SIWX91X_CLK_ADC 17 |
| #define SIWX91X_CLK_DMA0 7 |
| #define SIWX91X_CLK_GPDMA0 18 |
| #define SIWX91X_CLK_GSPI 10 |
| #define SIWX91X_CLK_I2C0 5 |
| #define SIWX91X_CLK_I2C1 6 |
| #define SIWX91X_CLK_I2S0 13 |
| #define SIWX91X_CLK_PWM 9 |
| #define SIWX91X_CLK_QSPI 11 |
| #define SIWX91X_CLK_RNG 19 |
| #define SIWX91X_CLK_RTC 12 |
| #define SIWX91X_CLK_STATIC_I2S0 14 |
| #define SIWX91X_CLK_STATIC_ULP_I2S 16 |
| #define SIWX91X_CLK_UART0 3 |
| #define SIWX91X_CLK_UART1 4 |
| #define SIWX91X_CLK_ULP_DMA 2 |
| #define SIWX91X_CLK_ULP_I2C 1 |
| #define SIWX91X_CLK_ULP_I2S 15 |
| #define SIWX91X_CLK_ULP_UART 0 |
| #define SIWX91X_CLK_WATCHDOG 8 |