sdc_hci_vs.h

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/*
 * Copyright (c) Nordic Semiconductor ASA
 *
 * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
 */
 
#ifndef SDC_HCI_VS_H__
#define SDC_HCI_VS_H__
 
#ifdef __cplusplus
extern "C" {
#endif
 
#include <stdint.h>
#include <nrfx.h>
 
enum sdc_hci_opcode_vs
{
    SDC_HCI_OPCODE_CMD_VS_ZEPHYR_READ_VERSION_INFO = 0xfc01,
    SDC_HCI_OPCODE_CMD_VS_ZEPHYR_READ_SUPPORTED_COMMANDS = 0xfc02,
    SDC_HCI_OPCODE_CMD_VS_ZEPHYR_WRITE_BD_ADDR = 0xfc06,
    SDC_HCI_OPCODE_CMD_VS_ZEPHYR_READ_STATIC_ADDRESSES = 0xfc09,
    SDC_HCI_OPCODE_CMD_VS_ZEPHYR_READ_KEY_HIERARCHY_ROOTS = 0xfc0a,
    SDC_HCI_OPCODE_CMD_VS_ZEPHYR_READ_CHIP_TEMP = 0xfc0b,
    SDC_HCI_OPCODE_CMD_VS_ZEPHYR_WRITE_TX_POWER = 0xfc0e,
    SDC_HCI_OPCODE_CMD_VS_ZEPHYR_READ_TX_POWER = 0xfc0f,
    SDC_HCI_OPCODE_CMD_VS_DTM_COMMAND = 0xfc1f,
    SDC_HCI_OPCODE_CMD_VS_LLPM_MODE_SET = 0xfd01,
    SDC_HCI_OPCODE_CMD_VS_CONN_UPDATE = 0xfd02,
    SDC_HCI_OPCODE_CMD_VS_CONN_EVENT_EXTEND = 0xfd03,
    SDC_HCI_OPCODE_CMD_VS_QOS_CONN_EVENT_REPORT_ENABLE = 0xfd04,
    SDC_HCI_OPCODE_CMD_VS_EVENT_LENGTH_SET = 0xfd05,
    SDC_HCI_OPCODE_CMD_VS_PERIODIC_ADV_EVENT_LENGTH_SET = 0xfd06,
    SDC_HCI_OPCODE_CMD_VS_PERIPHERAL_LATENCY_MODE_SET = 0xfd09,
    SDC_HCI_OPCODE_CMD_VS_WRITE_REMOTE_TX_POWER = 0xfd0a,
    SDC_HCI_OPCODE_CMD_VS_SET_ADV_RANDOMNESS = 0xfd0c,
    SDC_HCI_OPCODE_CMD_VS_COMPAT_MODE_WINDOW_OFFSET_SET = 0xfd0d,
    SDC_HCI_OPCODE_CMD_VS_QOS_CHANNEL_SURVEY_ENABLE = 0xfd0e,
    SDC_HCI_OPCODE_CMD_VS_SET_POWER_CONTROL_REQUEST_PARAMS = 0xfd10,
    SDC_HCI_OPCODE_CMD_VS_READ_AVERAGE_RSSI = 0xfd11,
    SDC_HCI_OPCODE_CMD_VS_CENTRAL_ACL_EVENT_SPACING_SET = 0xfd12,
    SDC_HCI_OPCODE_CMD_VS_GET_NEXT_CONN_EVENT_COUNTER = 0xfd14,
    SDC_HCI_OPCODE_CMD_VS_ALLOW_PARALLEL_CONNECTION_ESTABLISHMENTS = 0xfd15,
    SDC_HCI_OPCODE_CMD_VS_MIN_VAL_OF_MAX_ACL_TX_PAYLOAD_SET = 0xfd16,
    SDC_HCI_OPCODE_CMD_VS_ISO_READ_TX_TIMESTAMP = 0xfd17,
    SDC_HCI_OPCODE_CMD_VS_BIG_RESERVED_TIME_SET = 0xfd18,
    SDC_HCI_OPCODE_CMD_VS_CIG_RESERVED_TIME_SET = 0xfd19,
    SDC_HCI_OPCODE_CMD_VS_CIS_SUBEVENT_LENGTH_SET = 0xfd1a,
    SDC_HCI_OPCODE_CMD_VS_SCAN_CHANNEL_MAP_SET = 0xfd1b,
    SDC_HCI_OPCODE_CMD_VS_SCAN_ACCEPT_EXT_ADV_PACKETS_SET = 0xfd1c,
    SDC_HCI_OPCODE_CMD_VS_SET_ROLE_PRIORITY = 0xfd1d,
    SDC_HCI_OPCODE_CMD_VS_SET_EVENT_START_TASK = 0xfd1e,
    SDC_HCI_OPCODE_CMD_VS_CONN_ANCHOR_POINT_UPDATE_EVENT_REPORT_ENABLE = 0xfd1f,
    SDC_HCI_OPCODE_CMD_VS_ENABLE_PERIODIC_ADV_EVENT_COUNTER_REPORTS = 0xfd20,
    SDC_HCI_OPCODE_CMD_VS_CS_PARAMS_SET = 0xfd22,
    SDC_HCI_OPCODE_CMD_VS_TRANSMITTER_CARRIER_TEST = 0xfd23,
};
 
enum sdc_hci_subevent_vs
{
    SDC_HCI_SUBEVENT_VS_QOS_CONN_EVENT_REPORT = 0x80,
    SDC_HCI_SUBEVENT_VS_QOS_CHANNEL_SURVEY_REPORT = 0x81,
    SDC_HCI_SUBEVENT_VS_CONN_ANCHOR_POINT_UPDATE_REPORT = 0x82,
    SDC_HCI_SUBEVENT_VS_PERIODIC_ADV_EVENT_COUNTER_REPORT = 0x84,
};
 
enum sdc_hci_vs_cs_param_type
{
    SDC_HCI_VS_CS_PARAM_TYPE_CS_EVENT_LENGTH_SET = 0x00,
    SDC_HCI_VS_CS_PARAM_TYPE_CS_T_PM_SET = 0x01,
    SDC_HCI_VS_CS_PARAM_TYPE_CS_BOARD_DISTANCE_OFFSET_SET = 0x02,
    SDC_HCI_VS_CS_PARAM_TYPE_CS_VREG_MODE_SET = 0x03,
    SDC_HCI_VS_CS_PARAM_TYPE_MAX = 0x04,
};
 
enum sdc_hci_vs_dtm_command_opcode
{
    SDC_HCI_VS_DTM_COMMAND_OPCODE_TEST_END = 0x00,
    SDC_HCI_VS_DTM_COMMAND_OPCODE_TRANSMITTER_CARRIER_TEST = 0x01,
};
 
enum sdc_hci_vs_peripheral_latency_mode
{
    SDC_HCI_VS_PERIPHERAL_LATENCY_MODE_ENABLE = 0x00,
    SDC_HCI_VS_PERIPHERAL_LATENCY_MODE_DISABLE = 0x01,
    SDC_HCI_VS_PERIPHERAL_LATENCY_MODE_WAIT_FOR_ACK = 0x02,
};
 
enum sdc_hci_vs_set_event_start_task_handle_type
{
    SDC_HCI_VS_SET_EVENT_START_TASK_HANDLE_TYPE_SCAN = 0x01,
    SDC_HCI_VS_SET_EVENT_START_TASK_HANDLE_TYPE_INITIATOR = 0x02,
    SDC_HCI_VS_SET_EVENT_START_TASK_HANDLE_TYPE_CONN = 0x03,
    SDC_HCI_VS_SET_EVENT_START_TASK_HANDLE_TYPE_ADV = 0x04,
};
 
enum sdc_hci_vs_set_role_priority_handle_type
{
    SDC_HCI_VS_SET_ROLE_PRIORITY_HANDLE_TYPE_INITIATOR_SECONDARY_CHANNEL = 0x04,
};
 
enum sdc_hci_vs_tx_power_handle_type
{
    SDC_HCI_VS_TX_POWER_HANDLE_TYPE_ADV = 0x00,
    SDC_HCI_VS_TX_POWER_HANDLE_TYPE_SCAN_INIT = 0x01,
    SDC_HCI_VS_TX_POWER_HANDLE_TYPE_CONN = 0x02,
    SDC_HCI_VS_TX_POWER_HANDLE_TYPE_SYNC = 0x03,
    SDC_HCI_VS_TX_POWER_HANDLE_TYPE_ISO_BROADCASTER = 0x04,
};
 
typedef struct __PACKED __ALIGN(1)
{
    int16_t cs_board_distance_offset_cm;
} sdc_hci_vs_cs_board_distance_offset_params_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint32_t cs_event_length_us;
} sdc_hci_vs_cs_event_length_params_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t cs_t_pm_length_us;
} sdc_hci_vs_cs_t_pm_params_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t cs_vreg_mode_enable_ldo;
} sdc_hci_vs_cs_vreg_mode_params_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t sub_opcode;
} sdc_hci_vs_dtm_command_header_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t address[6];
    uint8_t identity_root[16];
} sdc_hci_vs_zephyr_static_address_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t read_version_info : 1;
    uint8_t read_supported_commands : 1;
    uint8_t read_supported_features : 1;
    uint8_t set_event_mask : 1;
    uint8_t reset : 1;
    uint8_t write_bd_addr : 1;
    uint8_t set_trace_enable : 1;
    uint8_t read_build_info : 1;
    uint8_t read_static_addresses : 1;
    uint8_t read_key_hierarchy_roots : 1;
    uint8_t read_chip_temperature : 1;
    uint8_t read_host_stack_commands : 1;
    uint8_t set_scan_request_reports : 1;
    uint8_t write_tx_power_level : 1;
    uint8_t read_tx_power_level : 1;
} sdc_hci_vs_zephyr_supported_commands_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint16_t conn_handle;
    uint16_t event_counter;
    uint8_t channel_index;
    uint16_t crc_ok_count;
    uint16_t crc_error_count;
    uint16_t nak_count;
    uint8_t rx_timeout : 1;
} sdc_hci_subevent_vs_qos_conn_event_report_t;
 
typedef struct __PACKED __ALIGN(1)
{
    int8_t channel_energy[40];
} sdc_hci_subevent_vs_qos_channel_survey_report_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint16_t conn_handle;
    uint16_t event_counter;
    uint64_t anchor_point_us;
} sdc_hci_subevent_vs_conn_anchor_point_update_report_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t adv_handle;
    uint16_t pa_event_counter;
} sdc_hci_subevent_vs_periodic_adv_event_counter_report_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint16_t hw_platform;
    uint16_t hw_variant;
    uint8_t fw_variant;
    uint8_t fw_version;
    uint16_t fw_revision;
    uint32_t fw_build;
} sdc_hci_cmd_vs_zephyr_read_version_info_return_t;
 
typedef union __PACKED __ALIGN(1)
{
    sdc_hci_vs_zephyr_supported_commands_t params;
    uint8_t raw[64];
} sdc_hci_cmd_vs_zephyr_read_supported_commands_return_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t bd_addr[6];
} sdc_hci_cmd_vs_zephyr_write_bd_addr_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t num_addresses;
    sdc_hci_vs_zephyr_static_address_t addresses[];
} sdc_hci_cmd_vs_zephyr_read_static_addresses_return_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t ir[16];
    uint8_t er[16];
} sdc_hci_cmd_vs_zephyr_read_key_hierarchy_roots_return_t;
 
typedef struct __PACKED __ALIGN(1)
{
    int8_t temp;
} sdc_hci_cmd_vs_zephyr_read_chip_temp_return_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t handle_type;
    uint16_t handle;
    int8_t tx_power_level;
} sdc_hci_cmd_vs_zephyr_write_tx_power_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t handle_type;
    uint16_t handle;
    int8_t selected_tx_power;
} sdc_hci_cmd_vs_zephyr_write_tx_power_return_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t handle_type;
    uint16_t handle;
} sdc_hci_cmd_vs_zephyr_read_tx_power_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t handle_type;
    uint16_t handle;
    int8_t selected_tx_power;
} sdc_hci_cmd_vs_zephyr_read_tx_power_return_t;
 
typedef struct __PACKED __ALIGN(1)
{
    sdc_hci_vs_dtm_command_header_t header;
    uint8_t tx_channel;
    int8_t tx_power_level;
} sdc_hci_cmd_vs_dtm_transmitter_carrier_test_t;
 
typedef struct __PACKED __ALIGN(1)
{
    sdc_hci_vs_dtm_command_header_t header;
} sdc_hci_cmd_vs_dtm_test_end_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint16_t num_packets;
} sdc_hci_cmd_vs_dtm_test_end_return_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t enable;
} sdc_hci_cmd_vs_llpm_mode_set_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint16_t conn_handle;
    uint32_t conn_interval_us;
    uint16_t conn_latency;
    uint16_t supervision_timeout;
} sdc_hci_cmd_vs_conn_update_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t enable;
} sdc_hci_cmd_vs_conn_event_extend_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t enable;
} sdc_hci_cmd_vs_qos_conn_event_report_enable_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint32_t event_length_us;
} sdc_hci_cmd_vs_event_length_set_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint32_t event_length_us;
} sdc_hci_cmd_vs_periodic_adv_event_length_set_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint16_t conn_handle;
    uint8_t mode;
} sdc_hci_cmd_vs_peripheral_latency_mode_set_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint16_t conn_handle;
    uint8_t phy;
    int8_t delta;
} sdc_hci_cmd_vs_write_remote_tx_power_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t adv_handle;
    uint16_t rand_us;
} sdc_hci_cmd_vs_set_adv_randomness_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t enable;
} sdc_hci_cmd_vs_compat_mode_window_offset_set_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t enable;
    uint32_t interval_us;
} sdc_hci_cmd_vs_qos_channel_survey_enable_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t auto_enable;
    uint8_t apr_enable;
    uint16_t beta;
    int8_t lower_limit;
    int8_t upper_limit;
    int8_t lower_target_rssi;
    int8_t upper_target_rssi;
    uint16_t wait_period_ms;
    uint8_t apr_margin;
} sdc_hci_cmd_vs_set_power_control_request_params_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint16_t conn_handle;
} sdc_hci_cmd_vs_read_average_rssi_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint16_t conn_handle;
    int8_t avg_rssi;
} sdc_hci_cmd_vs_read_average_rssi_return_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint32_t central_acl_event_spacing_us;
} sdc_hci_cmd_vs_central_acl_event_spacing_set_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint16_t conn_handle;
} sdc_hci_cmd_vs_get_next_conn_event_counter_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint16_t conn_handle;
    uint16_t next_conn_event_counter;
} sdc_hci_cmd_vs_get_next_conn_event_counter_return_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t enable;
} sdc_hci_cmd_vs_allow_parallel_connection_establishments_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t min_val_of_max_acl_tx_payload;
} sdc_hci_cmd_vs_min_val_of_max_acl_tx_payload_set_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint16_t conn_handle;
} sdc_hci_cmd_vs_iso_read_tx_timestamp_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint16_t conn_handle;
    uint16_t packet_sequence_number;
    uint32_t tx_time_stamp;
} sdc_hci_cmd_vs_iso_read_tx_timestamp_return_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint32_t reserved_time_us;
} sdc_hci_cmd_vs_big_reserved_time_set_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint32_t reserved_time_us;
} sdc_hci_cmd_vs_cig_reserved_time_set_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint32_t cis_subevent_length_us;
} sdc_hci_cmd_vs_cis_subevent_length_set_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t channel_map[5];
} sdc_hci_cmd_vs_scan_channel_map_set_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t accept_ext_adv_packets;
} sdc_hci_cmd_vs_scan_accept_ext_adv_packets_set_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t handle_type;
    uint16_t handle;
    uint8_t priority;
} sdc_hci_cmd_vs_set_role_priority_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t handle_type;
    uint16_t handle;
    uint32_t task_address;
} sdc_hci_cmd_vs_set_event_start_task_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t enable;
} sdc_hci_cmd_vs_conn_anchor_point_update_event_report_enable_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t enable;
} sdc_hci_cmd_vs_enable_periodic_adv_event_counter_reports_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t cs_param_type;
    union __PACKED __ALIGN(1) {
        sdc_hci_vs_cs_event_length_params_t cs_event_length_params;
        sdc_hci_vs_cs_t_pm_params_t cs_t_pm_params;
        sdc_hci_vs_cs_board_distance_offset_params_t cs_board_distance_offset_params;
        sdc_hci_vs_cs_vreg_mode_params_t cs_vreg_mode_params;
    } cs_param_data;
} sdc_hci_cmd_vs_cs_params_set_t;
 
typedef struct __PACKED __ALIGN(1)
{
    uint8_t tx_channel;
    int8_t tx_power_level;
} sdc_hci_cmd_vs_transmitter_carrier_test_t;
 
typedef struct __PACKED __ALIGN(1)
{
    union __PACKED __ALIGN(1) {
        sdc_hci_vs_dtm_command_header_t header;
        sdc_hci_cmd_vs_dtm_transmitter_carrier_test_t transmitter_carrier_test;
        sdc_hci_cmd_vs_dtm_test_end_t test_end;
    } command_parameters;
} sdc_hci_cmd_vs_dtm_command_t;
 
uint8_t sdc_hci_cmd_vs_zephyr_read_version_info(sdc_hci_cmd_vs_zephyr_read_version_info_return_t * p_return);
 
uint8_t sdc_hci_cmd_vs_zephyr_read_supported_commands(sdc_hci_cmd_vs_zephyr_read_supported_commands_return_t * p_return);
 
uint8_t sdc_hci_cmd_vs_zephyr_write_bd_addr(const sdc_hci_cmd_vs_zephyr_write_bd_addr_t * p_params);
 
uint8_t sdc_hci_cmd_vs_zephyr_read_static_addresses(sdc_hci_cmd_vs_zephyr_read_static_addresses_return_t * p_return);
 
uint8_t sdc_hci_cmd_vs_zephyr_read_key_hierarchy_roots(sdc_hci_cmd_vs_zephyr_read_key_hierarchy_roots_return_t * p_return);
 
uint8_t sdc_hci_cmd_vs_zephyr_read_chip_temp(sdc_hci_cmd_vs_zephyr_read_chip_temp_return_t * p_return);
 
uint8_t sdc_hci_cmd_vs_zephyr_write_tx_power(const sdc_hci_cmd_vs_zephyr_write_tx_power_t * p_params,
                                             sdc_hci_cmd_vs_zephyr_write_tx_power_return_t * p_return);
 
uint8_t sdc_hci_cmd_vs_zephyr_read_tx_power(const sdc_hci_cmd_vs_zephyr_read_tx_power_t * p_params,
                                            sdc_hci_cmd_vs_zephyr_read_tx_power_return_t * p_return);
 
uint8_t sdc_hci_cmd_vs_dtm_command(const sdc_hci_cmd_vs_dtm_command_t * p_params,
                    void * p_return, uint8_t * p_return_length_out);
 
uint8_t sdc_hci_cmd_vs_llpm_mode_set(const sdc_hci_cmd_vs_llpm_mode_set_t * p_params);
 
uint8_t sdc_hci_cmd_vs_conn_update(const sdc_hci_cmd_vs_conn_update_t * p_params);
 
uint8_t sdc_hci_cmd_vs_conn_event_extend(const sdc_hci_cmd_vs_conn_event_extend_t * p_params);
 
uint8_t sdc_hci_cmd_vs_qos_conn_event_report_enable(const sdc_hci_cmd_vs_qos_conn_event_report_enable_t * p_params);
 
uint8_t sdc_hci_cmd_vs_event_length_set(const sdc_hci_cmd_vs_event_length_set_t * p_params);
 
uint8_t sdc_hci_cmd_vs_periodic_adv_event_length_set(const sdc_hci_cmd_vs_periodic_adv_event_length_set_t * p_params);
 
uint8_t sdc_hci_cmd_vs_peripheral_latency_mode_set(const sdc_hci_cmd_vs_peripheral_latency_mode_set_t * p_params);
 
uint8_t sdc_hci_cmd_vs_write_remote_tx_power(const sdc_hci_cmd_vs_write_remote_tx_power_t * p_params);
 
uint8_t sdc_hci_cmd_vs_set_adv_randomness(const sdc_hci_cmd_vs_set_adv_randomness_t * p_params);
 
uint8_t sdc_hci_cmd_vs_compat_mode_window_offset_set(const sdc_hci_cmd_vs_compat_mode_window_offset_set_t * p_params);
 
uint8_t sdc_hci_cmd_vs_qos_channel_survey_enable(const sdc_hci_cmd_vs_qos_channel_survey_enable_t * p_params);
 
uint8_t sdc_hci_cmd_vs_set_power_control_request_params(const sdc_hci_cmd_vs_set_power_control_request_params_t * p_params);
 
uint8_t sdc_hci_cmd_vs_read_average_rssi(const sdc_hci_cmd_vs_read_average_rssi_t * p_params,
                                         sdc_hci_cmd_vs_read_average_rssi_return_t * p_return);
 
uint8_t sdc_hci_cmd_vs_central_acl_event_spacing_set(const sdc_hci_cmd_vs_central_acl_event_spacing_set_t * p_params);
 
uint8_t sdc_hci_cmd_vs_get_next_conn_event_counter(const sdc_hci_cmd_vs_get_next_conn_event_counter_t * p_params,
                                                   sdc_hci_cmd_vs_get_next_conn_event_counter_return_t * p_return);
 
uint8_t sdc_hci_cmd_vs_allow_parallel_connection_establishments(const sdc_hci_cmd_vs_allow_parallel_connection_establishments_t * p_params);
 
uint8_t sdc_hci_cmd_vs_min_val_of_max_acl_tx_payload_set(const sdc_hci_cmd_vs_min_val_of_max_acl_tx_payload_set_t * p_params);
 
uint8_t sdc_hci_cmd_vs_iso_read_tx_timestamp(const sdc_hci_cmd_vs_iso_read_tx_timestamp_t * p_params,
                                             sdc_hci_cmd_vs_iso_read_tx_timestamp_return_t * p_return);
 
uint8_t sdc_hci_cmd_vs_big_reserved_time_set(const sdc_hci_cmd_vs_big_reserved_time_set_t * p_params);
 
uint8_t sdc_hci_cmd_vs_cig_reserved_time_set(const sdc_hci_cmd_vs_cig_reserved_time_set_t * p_params);
 
uint8_t sdc_hci_cmd_vs_cis_subevent_length_set(const sdc_hci_cmd_vs_cis_subevent_length_set_t * p_params);
 
uint8_t sdc_hci_cmd_vs_scan_channel_map_set(const sdc_hci_cmd_vs_scan_channel_map_set_t * p_params);
 
uint8_t sdc_hci_cmd_vs_scan_accept_ext_adv_packets_set(const sdc_hci_cmd_vs_scan_accept_ext_adv_packets_set_t * p_params);
 
uint8_t sdc_hci_cmd_vs_set_role_priority(const sdc_hci_cmd_vs_set_role_priority_t * p_params);
 
uint8_t sdc_hci_cmd_vs_set_event_start_task(const sdc_hci_cmd_vs_set_event_start_task_t * p_params);
 
uint8_t sdc_hci_cmd_vs_conn_anchor_point_update_event_report_enable(const sdc_hci_cmd_vs_conn_anchor_point_update_event_report_enable_t * p_params);
 
uint8_t sdc_hci_cmd_vs_enable_periodic_adv_event_counter_reports(const sdc_hci_cmd_vs_enable_periodic_adv_event_counter_reports_t * p_params);
 
uint8_t sdc_hci_cmd_vs_cs_params_set(const sdc_hci_cmd_vs_cs_params_set_t * p_params);
 
uint8_t sdc_hci_cmd_vs_transmitter_carrier_test(const sdc_hci_cmd_vs_transmitter_carrier_test_t * p_params);
 
#ifdef __cplusplus
}
#endif
 
#endif /* SDC_HCI_VS_H__ */