High-Performance Framework (HPF)

Caution

The High-Performance Framework (HPF) support in the nRF Connect SDK is experimental and is limited to the nRF54L15 and nRF54LM20 devices.

Subsequent sections explain practical aspects of using the High-Performance Framework (HPF).

The integrated RISC-V coprocessor (FLPR) provides real-time peripherals mapped to the processor’s Control and Status Register (CSR) space. It facilitates development of custom, software-defined peripherals, enhancing functionality and performance of the main processor.

HPF is designed for optimal size and latency. To achieve this, the Zephyr kernel and other unnecessary components are disabled. For details see the configuration files nrf/applications/hpf/mspi/boards/nrf54l15dk_nrf54l15_cpuflpr.conf or nrf/applications/hpf/mspi/boards/nrf54lm20adk_nrf54lm20a_cpuflpr.conf. With these changes, the application runs in a simple, single-threaded, baremetal environment.

High-Performance Framework, is a framework designed to facilitate the creation and integration of software peripherals using coprocessors. It provides the following resources:

• Targeted tools - Hardware Abstraction Layers (HALs) for VPR’s Real-Time peripherals and CMake targets for assembly management.

• Application examples for the supported drivers.

• Descriptions of architectural issues when creating software peripherals: event handling, fault handling, and power management.

These resources are intended to serve as foundational starting points, enabling you to create customized software peripherals tailored to specific application needs.

Contents

• Assembly management
• Event handling
• Fault handling
• Power management
• Real-time peripherals