Working with the FLPR core

The nRF54H20 SoC includes a dedicated VPR CPU, based on RISC-V architecture, known as the Fast Lightweight Peripheral Processor (FLPR). These peripherals have IRQs routed to FLPR:

  • USBHS

  • EXMIF

  • I3C120

  • CAN120

  • I3C121

  • TIMER120

  • TIMER121

  • PWM120

  • SPIS120

  • SPIM120/UARTE120

  • SPIM121

See Assigning peripherals to cores on the nRF54H20 SoC for information on how to assign peripherals to the FLPR core. All other peripherals available to the application core can also be used with FLPR. However, they require the use of polling mode.

Using Zephyr multithreaded mode on FLPR

The FLPR core can operate as a general-purpose core, running under the full Zephyr kernel. Building the FLPR target is similar to building the application core, but the application core build must include an overlay that enables the FLPR core.

Bootstrapping the FLPR core

The nRF Connect SDK provides a FLPR snippet that adds the overlay needed for bootstrapping the FLPR core. The primary purpose of this snippet is to enable the transfer of the FLPR code to the designated memory region (if required) and initiate the FLPR core.

When building for the nrf54h20dk/nrf54h20/cpuflpr target, a minimal sample is automatically loaded onto the application core. For more details, see Building for both the application and FLPR core.

Peripherals emulation on FLPR

The FLPR core can emulate software-defined peripherals using Soft peripherals. This setup is useful in scenarios where you need an additional peripheral functionality but do not have access to hardware peripherals.

Memory allocation

Running the FLPR CPU can lead to increased latency when accessing RAM_21. To mitigate this, use RAM_21 exclusively for FLPR code, FLPR data, and non-time-sensitive information from the application CPU. For data that requires strict access times, such as CPU data used in low-latency Interrupt Service Routines (ISRs), use local RAM or, when greater latency is acceptable, RAM_0x. Place the DMA buffers in a memory designed to a given peripheral.

Building and programming with the nRF54H20 DK

Depending on the sample, you might need to program only the application core or both the FLPR and application cores. Additionally, the process varies depending on whether you are working with a single-image or multi-image build.

Note

The following instructions do not cover the scenario of multi-image single-core builds.

Building for the application core only

Building for the application core follows the default building process for the nRF Connect SDK. For detailed instructions, refer to the Building an application page.

Building for both the application and FLPR core

Building for both the application core and the FLPR core differs from the default nRF Connect SDK procedure. Additional configuration is required to enable the FLPR core.

This section explains how to build and program both cores, covering separate builds and sysbuild configurations. The FLPR core supports two variants:

  • nrf54h20dk/nrf54h20/cpuflpr: FLPR runs from RAM_21 (recommended method). The application core image must include the nordic-flpr snippet.

  • nrf54h20dk/nrf54h20/cpuflpr/xip: FLPR runs from MRAM. The application core image must include the nordic-flpr-xip snippet.

Standard build

This section explains how to build an application using sysbuild.

Note

Currently, the documentation does not provide specific instructions for building an application image using sysbuild to incorporate the FLPR core as a sub-image. The only documented scenario involves building the FLPR as the main image and the application as a sub-image.

To complete the build, do the following:

This option automatically programs the FLPR core with dedicated bootstrapping firmware.

To build and flash both images, run the following command to perform a pristine build:

west build -p -b nrf54h20dk/nrf54h20/cpuflpr
west flash

Separate images

You can build and program the application sample and the FLPR sample as separate images using either nRF Connect for VS Code or the command line. To use nRF Util, see nRF Util. Depending on the method you select, complete the following steps:

  1. Open nRF Connect for VS Code.

  2. Complete the steps listed on the How to build an application page in the nRF Connect for VS Code documentation.

  1. Build the application image by configuring the following options:

    • Set the Board target to nrf54h20dk/nrf54h20/cpuapp.

    • Select either the nordic-flpr or nordic-flpr-xip snippet, depending on the FLPR image target.

    • Set System build to No sysbuild.

    For more information, see Providing CMake options.

  2. Build the FLPR image by configuring the following options:

    • Set the Board target to nrf54h20dk/nrf54h20/cpuflpr (recommended) or nrf54h20dk/nrf54h20/cpuflpr/xip.

    • Set System build to No sysbuild.

    For more information, see Providing CMake options.