Wireless Tracker (V1.1)

Overview

The Heltec Wireless Tracker V1.1 is a development kit based on ESP32-S3FN8. It integrates both SX1262 LoRa transceiver and UC6580 GNSS chip to provide fast GNSS solution for IoT. [1]

Note

This board support package targets the Heltec Wireless Tracker V1.1. In this revision, the GNSS power-control pin has changed: GPIO3 must be driven HIGH to enable the GNSS module. For additional hardware differences between versions, refer to the official hardware revision logs.

Hardware

The main hardware features are:

  • ESP32-S3FN8 low-power MCU-based SoC (dual-core Xtensa® 32-bit LX7 microprocessor, five stage pipeline rack Structure, main frequency up to 240 MHz).

  • Semtech SX1262 LoRa node chip

  • UC6580 GNSS chip with L1 + L5/L2 dual-frequency multi-system support (GPS, GLONASS, BDS, Galileo, NAVIC, QZSS)

  • 0.96-inch 160×80 dot matrix LCD display (ST7735) for debugging information, battery power, and other information

  • Type-C USB interface with a complete voltage regulator, ESD protection, short circuit protection, RF shielding, and other protection measures

  • Onboard SH1.25-2 battery interface, integrated lithium battery management system (charge and discharge management, overcharge protection, battery power detection, USB / battery power automatic switching)

  • Integrated WiFi and Bluetooth interfaces with 2.4GHz metal spring antenna and reserved IPEX (U.FL) interface for LoRa and GNSS use

  • Good RF circuit design and low-power design

ESP32-S3 Features

ESP32-S3 is a low-power MCU-based system on a chip (SoC) with integrated 2.4 GHz Wi-Fi and Bluetooth® Low Energy (Bluetooth LE). It consists of high-performance dual-core microprocessor (Xtensa® 32-bit LX7), a low power coprocessor, a Wi-Fi baseband, a Bluetooth LE baseband, RF module, and numerous peripherals.

ESP32-S3 SoC includes the following features:

  • Dual core 32-bit Xtensa Microprocessor (Tensilica LX7), running up to 240MHz

  • Additional vector instructions support for AI acceleration

  • 512KB of SRAM

  • 384KB of ROM

  • Wi-Fi 802.11b/g/n

  • Bluetooth LE 5.0 with long-range support and up to 2Mbps data rate

Digital interfaces:

  • 45 programmable GPIOs

  • 4x SPI

  • 1x LCD interface (8-bit ~16-bit parallel RGB, I8080 and MOTO6800), supporting conversion between RGB565, YUV422, YUV420 and YUV411

  • 1x DVP 8-bit ~16-bit camera interface

  • 3x UART

  • 2x I2C

  • 2x I2S

  • 1x RMT (TX/RX)

  • 1x pulse counter

  • LED PWM controller, up to 8 channels

  • 1x full-speed USB OTG

  • 1x USB Serial/JTAG controller

  • 2x MCPWM

  • 1x SDIO host controller with 2 slots

  • General DMA controller (GDMA), with 5 transmit channels and 5 receive channels

  • 1x TWAI® controller, compatible with ISO 11898-1 (CAN Specification 2.0)

  • Addressable RGB LED, driven by GPIO38.

Analog interfaces:

  • 2x 12-bit SAR ADCs, up to 20 channels

  • 1x temperature sensor

  • 14x touch sensing IOs

Timers:

  • 4x 54-bit general-purpose timers

  • 1x 52-bit system timer

  • 3x watchdog timers

Low Power:

  • Power Management Unit with five power modes

  • Ultra-Low-Power (ULP) coprocessors: ULP-RISC-V and ULP-FSM

Security:

  • Secure boot

  • Flash encryption

  • 4-Kbit OTP, up to 1792 bits for users

  • Cryptographic hardware acceleration: (AES-128/256, Hash, RSA, RNG, HMAC, Digital signature)

Asymmetric Multiprocessing (AMP)

Boards featuring the ESP32 and ESP32-S3 SoC allows 2 different applications to be executed. Due to its dual-core architecture, each core can be enabled to execute customized tasks in stand-alone mode and/or exchanging data over OpenAMP framework. See Inter-Processor Communication (IPC) folder as code reference.

Note

AMP and serial output support

In the current Zephyr ESP32 implementation, access to Zephyr-managed serial drivers (such as printk(), logging, or the console UART) is not yet implemented for applications running on the APPCPU. As a result, serial output APIs provided by Zephyr are only available on the PROCPU.

As a mitigation, applications running on the APPCPU may use ESP32 ROM functions such as ets_printf() to emit diagnostic or debug output.

For more information, check the ESP32-S3 Datasheet [2] or the ESP32-S3 Technical Reference Manual [3].

Supported Features

The heltec_wireless_tracker board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

Connections and IOs

HelTec Wireless Tracker Pinout

Header

Function

Description

J2.1

5V

J2.2

GND

J2.3

3V3

J2.4

GND

J2.5

3V3

J2.6

GND

J2.7

Vext

J2.8

GND

J2.1

RST

Reset Switch

J2.2

GPIO0

User Switch

J2.3

ADC1_CH0

Battery Voltage Measurement

J2.4

GPIO2

ADC Control

J2.5

GPIO3

Vext Control

J2.6

GPIO19

J2.7

GPIO20

J2.8

GPIO21

TFT Backlight Control

J2.9

GPIO26

J2.10

GPIO48

J2.11

GPIO47

J2.12

GPIO33

UART2 GNSS RX

J2.13

GPIO34

UART2 GNSS TX

J2.14

GPIO35

J2.15

GPIO36

J2.16

GPIO37

J3.1

GPIO18

PWM LED Control

J3.2

GPIO17

J3.3

GPIO16

XTAL_32K N

J3.4

GPIO15

XTAL_32K P

J3.5

GPIO7

J3.6

GPIO6

J3.7

GPIO5

J3.8

GPIO4

J3.1

GPIO46

J3.2

GPIO45

J3.3

GPIO44

UART0 RX

J3.4

GPIO43

UART0 TX

J3.5

GPIO14

LoRa DIO1

J3.6

GPIO13

LoRa Busy

J3.7

GPIO12

LoRa RST

J3.8

GPIO11

LoRa MISO

J3.9

GPIO10

LoRa MOSI

J3.10

GPIO9

LoRa SCK

J3.11

GPIO8

LoRa NSS

J3.12

GPIO42

TFT_SDIN (MOSI)

J3.13

GPIO41

TFT_SCLK

J3.14

GPIO40

TFT_RS (DC)

J3.15

GPIO39

TFT_RES (RST)

J3.16

GPIO38

TFT_CS

Key Pin Assignments

GNSS (GPS) Module: - GNSS_TX (MCU UART2 TX): GPIO 34 (connects to GNSS RX) - GNSS_RX (MCU UART2 RX): GPIO 33 (connects to GNSS TX) - GNSS_Power_Control (VEXT): GPIO 3 (V1.1 specific - set to HIGH to enable GNSS)

Note

VEXT (GPIO 3) is automatically configured in board initialization code to be active at boot, ensuring the GNSS module is powered on startup.

LoRa Module (SX1262): - LoRa_DIO1: GPIO 14 - LoRa_Busy: GPIO 13 - LoRa_RST: GPIO 12 - LoRa_MISO: GPIO 11 - LoRa_MOSI: GPIO 10 - LoRa_SCK: GPIO 9 - LoRa_NSS: GPIO 8

TFT Display (ST7735) - Optional: - TFT_SDIN (MOSI): GPIO 42 - TFT_SCLK: GPIO 41 - TFT_RS (DC): GPIO 40 - TFT_RES (RST): GPIO 39 - TFT_CS: GPIO 38 - TFT_LED_K (Backlight): GPIO 21 - TFT_VTFT_CTRL (Power): GPIO 3 (shared with GNSS power control)

UART Interfaces: - UART0: U0RXD (GPIO 44), U0TXD (GPIO 43) - Console - UART1: U1RXD (GPIO 18), U1TXD (GPIO 17) - General purpose - UART2: U2RXD (GPIO 33), U2TXD (GPIO 34) - GNSS module

Power and Control: - VEXT Control: GPIO 3 (GNSS and TFT power, active HIGH) - ADC Control: GPIO 37 - User Button: GPIO 0 - Reset Button: RST

System Requirements

Binary Blobs

Espressif HAL requires RF binary blobs in order work. Run the command below to retrieve those files.

west blobs fetch hal_espressif

Note

It is recommended running the command above after west update.

Programming and Debugging

The heltec_wireless_tracker board supports the runners and associated west commands listed below.

flash debug

Simple Boot

The board could be loaded using the single binary image, without 2nd stage bootloader. It is the default option when building the application without additional configuration.

Note

Simple boot does not provide any security features nor OTA updates.

MCUboot Bootloader

User may choose to use MCUboot bootloader instead. In that case the bootloader must be built (and flashed) at least once.

There are two options to be used when building an application:

  1. Sysbuild

  2. Manual build

Note

User can select the MCUboot bootloader by adding the following line to the board default configuration file.

CONFIG_BOOTLOADER_MCUBOOT=y

Sysbuild

The sysbuild makes possible to build and flash all necessary images needed to bootstrap the board with the ESP32 SoC.

To build the sample application using sysbuild use the command:

west build -b <board> --sysbuild samples/hello_world

By default, the ESP32 sysbuild creates bootloader (MCUboot) and application images. But it can be configured to create other kind of images.

Build directory structure created by sysbuild is different from traditional Zephyr build. Output is structured by the domain subdirectories:

build/
├── hello_world
│   └── zephyr
│       ├── zephyr.elf
│       └── zephyr.bin
├── mcuboot
│    └── zephyr
│       ├── zephyr.elf
│       └── zephyr.bin
└── domains.yaml

Note

With --sysbuild option the bootloader will be re-build and re-flash every time the pristine build is used.

For more information about the system build please read the Sysbuild (System build) documentation.

Manual Build

During the development cycle, it is intended to build & flash as quickly possible. For that reason, images can be built one at a time using traditional build.

The instructions following are relevant for both manual build and sysbuild. The only difference is the structure of the build directory.

Note

Remember that bootloader (MCUboot) needs to be flash at least once.

Build and flash applications as usual (see Building an Application and Run an Application for more details).

# From the root of the zephyr repository
west build -b <board> samples/hello_world

The usual flash target will work with the board configuration. Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b <board> samples/hello_world
west flash

Open the serial monitor using the following command:

west espressif monitor

After the board has automatically reset and booted, you should see the following message in the monitor:

***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
Hello World! <board>

Board variants using Snippets

ESP32 boards can be assembled with different modules using multiple combinations of SPI flash sizes, PSRAM sizes and PSRAM modes. The snippets under snippets/espressif provide a modular way to apply these variations at build time without duplicating board definitions.

The following snippet-based variants are supported:

Snippet name

Description

Flash memory size

espressif-flash-4M

Board with 4MB of flash

espressif-flash-8M

Board with 8MB of flash

espressif-flash-16M

Board with 16MB of flash

espressif-flash-32M

Board with 32MB of flash

espressif-flash-64M

Board with 64MB of flash

espressif-flash-128M

Board with 128MB of flash

PSRAM memory size

espressif-psram-2M

Board with 2MB of PSRAM

espressif-psram-4M

Board with 4MB of PSRAM

espressif-psram-8M

Board with 8MB of PSRAM

PSRAM utilization

espressif-psram-reloc

Relocate flash to PSRAM

espressif-psram-wifi

Wi-Fi buffers in PSRAM

To apply a board variant, use the -S flag with west build:

west build -b <board> -S espressif-flash-32M -S espressif-psram-4M samples/hello_world

Note

These snippets are only applicable to boards with compatible hardware support for the selected flash/PSRAM configuration.

  • If no FLASH snippet is used, the board default flash size will be used.

  • If no PSRAM snippet is used, the board default psram size will be used.

Debugging

OpenOCD Debugging

Espressif chips require a custom OpenOCD build with ESP32-specific patches. Download the latest release from OpenOCD for ESP32 [4].

For detailed JTAG setup instructions, see JTAG debugging for ESP32 [6].

Zephyr Thread Awareness

OpenOCD supports Zephyr RTOS thread awareness, allowing GDB to:

  • List all threads with info threads

  • Display thread names, priorities, and states

  • Switch between thread contexts

  • Show backtraces for any thread

Requirements:

Example:

# From the root of the zephyr repository
west build -b <board> samples/hello_world -- -DCONFIG_DEBUG_THREAD_INFO=y -DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>
west debug

Using a Custom OpenOCD

The Zephyr SDK includes a bundled OpenOCD, but it may not have ESP32 support. To use the Espressif OpenOCD, specify the path when building:

# From the root of the zephyr repository
west build -b <board> samples/hello_world -- -DOPENOCD=/path/to/openocd -DOPENOCD_DEFAULT_PATH=/path/to/openocd/scripts
west debug

Applications

This board is suitable for:

  • GPS tracking applications

  • IoT sensor monitoring with location data

  • LoRaWAN networks with positioning

  • LoRa mesh networks with positioning (e.g., Meshtastic)

  • Display-based user interfaces (optional)

  • Battery-powered tracking devices

  • Asset tracking and monitoring

  • Environmental monitoring with GPS coordinates

Specifications

Heltec Wireless Tracker V1.1 Specifications

Parameters

Description

Master Chip

ESP32-S3FN8 (Xtensa(R) 32-bit lx7 dual core processor)

LoRa Chipset

SX1262

GNSS Chipset

UC6580

LoRa Frequency

470~510MHz, 863~928MHz

Max. TX Power

21+/-1dBm

Max. Receiving Sensitivity

-134dBm

Wi-Fi

802.11 b/g/n, up to 150Mbps

Bluetooth LE

Bluetooth 5, Bluetooth mesh

Hardware Resource

10xADC1 + 10xADC2; 12xTouch; 3xUART; 2xI2C; 2xSPI; etc.

Interface

Type-C USB; 2x1.25 lithium battery interface; LoRa ANT(IPEX1.0); 2x18x2.54 Header Pin

Battery

3.7V lithium battery power supply and charging

Operating Temperature

-20 ~ 70 degrees C

Dimensions

65.48 × 28.06 × 13.52mm

References