StampS3

Overview

M5Stack StampS3 is an ESP32-based development board from M5Stack.

Hardware

It features the following integrated components:

  • ESP32-S3FN8 chip (240MHz dual core)

  • 512KB SRAM

  • 384KB ROM

  • 8MB Flash

  • Wi-Fi

  • Bluetooth

  • User-Button

ESP32-S3 Features

ESP32-S3 is a low-power MCU-based system on a chip (SoC) with integrated 2.4 GHz Wi-Fi and Bluetooth® Low Energy (Bluetooth LE). It consists of high-performance dual-core microprocessor (Xtensa® 32-bit LX7), a low power coprocessor, a Wi-Fi baseband, a Bluetooth LE baseband, RF module, and numerous peripherals.

ESP32-S3 SoC includes the following features:

  • Dual core 32-bit Xtensa Microprocessor (Tensilica LX7), running up to 240MHz

  • Additional vector instructions support for AI acceleration

  • 512KB of SRAM

  • 384KB of ROM

  • Wi-Fi 802.11b/g/n

  • Bluetooth LE 5.0 with long-range support and up to 2Mbps data rate

Digital interfaces:

  • 45 programmable GPIOs

  • 4x SPI

  • 1x LCD interface (8-bit ~16-bit parallel RGB, I8080 and MOTO6800), supporting conversion between RGB565, YUV422, YUV420 and YUV411

  • 1x DVP 8-bit ~16-bit camera interface

  • 3x UART

  • 2x I2C

  • 2x I2S

  • 1x RMT (TX/RX)

  • 1x pulse counter

  • LED PWM controller, up to 8 channels

  • 1x full-speed USB OTG

  • 1x USB Serial/JTAG controller

  • 2x MCPWM

  • 1x SDIO host controller with 2 slots

  • General DMA controller (GDMA), with 5 transmit channels and 5 receive channels

  • 1x TWAI® controller, compatible with ISO 11898-1 (CAN Specification 2.0)

  • Addressable RGB LED, driven by GPIO38.

Analog interfaces:

  • 2x 12-bit SAR ADCs, up to 20 channels

  • 1x temperature sensor

  • 14x touch sensing IOs

Timers:

  • 4x 54-bit general-purpose timers

  • 1x 52-bit system timer

  • 3x watchdog timers

Low Power:

  • Power Management Unit with five power modes

  • Ultra-Low-Power (ULP) coprocessors: ULP-RISC-V and ULP-FSM

Security:

  • Secure boot

  • Flash encryption

  • 4-Kbit OTP, up to 1792 bits for users

  • Cryptographic hardware acceleration: (AES-128/256, Hash, RSA, RNG, HMAC, Digital signature)

Asymmetric Multiprocessing (AMP)

Boards featuring the ESP32 and ESP32-S3 SoC allows 2 different applications to be executed. Due to its dual-core architecture, each core can be enabled to execute customized tasks in stand-alone mode and/or exchanging data over OpenAMP framework. See Inter-Processor Communication (IPC) folder as code reference.

Note

AMP and serial output support

In the current Zephyr ESP32 implementation, access to Zephyr-managed serial drivers (such as printk(), logging, or the console UART) is not yet implemented for applications running on the APPCPU. As a result, serial output APIs provided by Zephyr are only available on the PROCPU.

As a mitigation, applications running on the APPCPU may use ESP32 ROM functions such as ets_printf() to emit diagnostic or debug output.

For more information, check the ESP32-S3 Datasheet [1] or the ESP32-S3 Technical Reference Manual [2].

Supported Features

The m5stack_stamps3 board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

Functional Description

The following table below describes the key components, interfaces, and controls of the M5Stack StampS3 module.

Key Component

Description

Status

ESP32-S3FN8 module

This MPU-ESP32S3 module provides complete Wi-Fi and Bluetooth functionalities and integrates a 8MB flash.

supported

Status LED

One user LED connected via worldsemi,ws2812-spi interface (led-strip).

supported

USB Port

USB interface. Power supply for the board as well as the communication interface between a computer and the board.

supported

User button

User button (sw0)

supported

Main connector header

The Zephyr m5stack_stamps3 board can be used on various applications. It therefore publishes a header definition to be used in different shields: m5stack,stamps3-header.

M5Stack StampS3 Header

M5Stack StampS3 connector header

Following interfaces are being exported for this header:

  • m5stack_stamps3_clkout0: PWM output with 2 channels (0 and 2).

  • m5stack_stamps3_spilcd: SPI interface for interfacing LCDs. Consists of a CLK, MOSI and CS signal.

  • m5stack_stamps3_i2c0 and m5stack_stamps3_i2c1: I2C interfaces (SDA, SCL).

  • m5stack_stamps3_uart0: UART interface (RXD, TXD).

  • m5stack_stamps3_header: All GPIOs are of course accessible via main header definition.

Pin

Functions

Pin

Functions

1

2

3

m5stack_stamps3_clkout0 - Channel 0

4

5

m5stack_stamps3_spilcd - MOSI

6

m5stack_stamps3_spilcd - CLK

7

m5stack_stamps3_spilcd - CS

28

3V3

8

27

m5stack_stamps3_uart0 - TXD

9

m5stack_stamps3_clkout0 - Channel 2

26

10

25

m5stack_stamps3_uart0 - RXD

11

GND

24

12

m5stack_stamps3_i2c1 - SDA

23

13

5V

22

EN

14

m5stack_stamps3_i2c1 - SCL

21

15

m5stack_stamps3_i2c0 - SDA

20

16

19

17

m5stack_stamps3_i2c0 - SCL

18

GND

Power supply

M5Stack StampS3 requires a single 5V input power supply. The module internally features a DCDC (MUN3CAD01-SC) to generate the 3.3V needed for the MCU.

The EN signal (Pin 22) is an active low signal to enable the 3V3 power supply. If this pin is pulled low this main 3.3V power supply for the MCU will be deactivated. It is internally equipped with a pull-up and can hence be left open if unused.

System Requirements

Binary Blobs

Espressif HAL requires RF binary blobs in order work. Run the command below to retrieve those files.

west blobs fetch hal_espressif

Note

It is recommended running the command above after west update.

Programming and Debugging

The m5stack_stamps3 board supports the runners and associated west commands listed below.

flash debug

Simple Boot

The board could be loaded using the single binary image, without 2nd stage bootloader. It is the default option when building the application without additional configuration.

Note

Simple boot does not provide any security features nor OTA updates.

MCUboot Bootloader

User may choose to use MCUboot bootloader instead. In that case the bootloader must be built (and flashed) at least once.

There are two options to be used when building an application:

  1. Sysbuild

  2. Manual build

Note

User can select the MCUboot bootloader by adding the following line to the board default configuration file.

CONFIG_BOOTLOADER_MCUBOOT=y

Sysbuild

The sysbuild makes possible to build and flash all necessary images needed to bootstrap the board with the ESP32 SoC.

To build the sample application using sysbuild use the command:

west build -b <board> --sysbuild samples/hello_world

By default, the ESP32 sysbuild creates bootloader (MCUboot) and application images. But it can be configured to create other kind of images.

Build directory structure created by sysbuild is different from traditional Zephyr build. Output is structured by the domain subdirectories:

build/
├── hello_world
│   └── zephyr
│       ├── zephyr.elf
│       └── zephyr.bin
├── mcuboot
│    └── zephyr
│       ├── zephyr.elf
│       └── zephyr.bin
└── domains.yaml

Note

With --sysbuild option the bootloader will be re-build and re-flash every time the pristine build is used.

For more information about the system build please read the Sysbuild (System build) documentation.

Manual Build

During the development cycle, it is intended to build & flash as quickly possible. For that reason, images can be built one at a time using traditional build.

The instructions following are relevant for both manual build and sysbuild. The only difference is the structure of the build directory.

Note

Remember that bootloader (MCUboot) needs to be flash at least once.

Build and flash applications as usual (see Building an Application and Run an Application for more details).

# From the root of the zephyr repository
west build -b <board> samples/hello_world

The usual flash target will work with the board configuration. Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b <board> samples/hello_world
west flash

Open the serial monitor using the following command:

west espressif monitor

After the board has automatically reset and booted, you should see the following message in the monitor:

***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
Hello World! <board>

Board variants using Snippets

ESP32 boards can be assembled with different modules using multiple combinations of SPI flash sizes, PSRAM sizes and PSRAM modes. The snippets under snippets/espressif provide a modular way to apply these variations at build time without duplicating board definitions.

The following snippet-based variants are supported:

Snippet name

Description

Flash memory size

espressif-flash-4M

Board with 4MB of flash

espressif-flash-8M

Board with 8MB of flash

espressif-flash-16M

Board with 16MB of flash

espressif-flash-32M

Board with 32MB of flash

espressif-flash-64M

Board with 64MB of flash

espressif-flash-128M

Board with 128MB of flash

PSRAM memory size

espressif-psram-2M

Board with 2MB of PSRAM

espressif-psram-4M

Board with 4MB of PSRAM

espressif-psram-8M

Board with 8MB of PSRAM

PSRAM utilization

espressif-psram-reloc

Relocate flash to PSRAM

espressif-psram-wifi

Wi-Fi buffers in PSRAM

To apply a board variant, use the -S flag with west build:

west build -b <board> -S espressif-flash-32M -S espressif-psram-4M samples/hello_world

Note

These snippets are only applicable to boards with compatible hardware support for the selected flash/PSRAM configuration.

  • If no FLASH snippet is used, the board default flash size will be used.

  • If no PSRAM snippet is used, the board default psram size will be used.

Debugging

OpenOCD Debugging

Espressif chips require a custom OpenOCD build with ESP32-specific patches. Download the latest release from OpenOCD for ESP32 [3].

For detailed JTAG setup instructions, see JTAG debugging for ESP32 [5].

Zephyr Thread Awareness

OpenOCD supports Zephyr RTOS thread awareness, allowing GDB to:

  • List all threads with info threads

  • Display thread names, priorities, and states

  • Switch between thread contexts

  • Show backtraces for any thread

Requirements:

Example:

# From the root of the zephyr repository
west build -b <board> samples/hello_world -- -DCONFIG_DEBUG_THREAD_INFO=y -DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>
west debug

Using a Custom OpenOCD

The Zephyr SDK includes a bundled OpenOCD, but it may not have ESP32 support. To use the Espressif OpenOCD, specify the path when building:

# From the root of the zephyr repository
west build -b <board> samples/hello_world -- -DOPENOCD=/path/to/openocd -DOPENOCD_DEFAULT_PATH=/path/to/openocd/scripts
west debug

M5Stack StampS3 exports a JTAG-interface via Pins 19 (MTCK), 21 (MTDO), 23 (MTDI), 25 (MTMS).

Note

Please note that additional JTAG equipment is needed to utilize JTAG. Refer to the ESP32S3 datasheet and the M5Stack StampS3 documentation for details.