RA6M5 Evaluation Kit

Overview

The Renesas RA6M5 group uses the high-performance Arm® Cortex®-M33 core with TrustZone®. The RA6M5 is suitable for IoT applications requiring Ethernet, future proof security, large embedded RAM, and low active power consumption down to 107uA/MHz running the CoreMark® algorithm from Flash.

The key features of the EK-RA6M5 board are categorized in three groups as follow:

MCU Native Pin Access

  • 200MHz Arm Cortex-M33 based RA6M5 MCU in 176 pins, LQFP package

  • Native pin access through 4 x 40-pin male headers

  • MCU current measurement points for precision current consumption measurement

  • Multiple clock sources - RA6M5 MCU oscillator and sub-clock oscillator crystals, providing precision 24.000 MHz and 32,768 Hz reference clock. Additional low precision clocks are available internal to the RA6M5 MCU

System Control and Ecosystem Access

  • USB Full Speed Host and Device (micro-AB connector)

  • Four 5V input sources

    • USB (Debug, Full Speed, High Speed)

    • External power supply (using surface mount clamp test points and power input vias)

  • Three Debug modes

    • Debug on-board (SWD)

    • Debug in (ETM, SWD and JTAG)

    • Debug out (SWD)

  • User LEDs and buttons

    • Three User LEDs (red, blue, green)

    • Power LED (white) indicating availability of regulated power

    • Debug LED (yellow) indicating the debug connection

    • Two User buttons

    • One Reset button

  • Five most popular ecosystems expansions

    • Two Seeed Grove system (I2C/Analog) connectors

    • One SparkFun Qwiic connector

    • Two Digilent Pmod (SPI and UART) connectors

    • Arduino (Uno R3) connector

    • MikroElektronika mikroBUS connector

  • MCU boot configuration jumper

Special Feature Access

  • Ethernet (RJ45 RMII interface)

  • USB High Speed Host and Device (micro-AB connector)

  • 32 Mb (256 Mb) External Quad-SPI Flash

  • 64 Mb (512 Mb) External Octo-SPI Flash

  • CAN (3-pin header)

Hardware

Detailed hardware features for the RA6M5 MCU group can be found at RA6M5 Group User’s Manual Hardware

RA6M5 MCU group feature

RA6M5 Block diagram (Credit: Renesas Electronics Corporation)

Detailed hardware features for the EK-RA6M5 MCU can be found at EK-RA6M5 - User’s Manual

Supported Features

The ek_ra6m5 board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

Programming and Debugging

The ek_ra6m5 board supports the runners and associated west commands listed below.

flash debug

Applications for the ek_ra6m5 board target configuration can be built, flashed, and debugged in the usual way. See Building an Application and Run an Application for more details on building and running.

Note

In applications using ethernet, ethernet buffers must be placed in non-secure RAM. This requires configuration of the Implementation Defined Attribution Unit (IDAU), which must be applied by partition memory using Renesas Flash Programmer.

Partition Memory

Renesas Flash Programmer is available at (Renesas Flash Programmer Download). Once downloaded and installed, check rfp-cli is available or set rfp-cli path manually.

Renesas partition data file will be available at build/zephyr/zephyr.rpd. Connect jumper J6 then run Renesas Flash Programmer.

To partition memory manually, execute:

# From the root of the zephyr repository
rfp-cli -device ra -tool jlink -fo boundary-file build/zephyr/zephyr.rpd -p

Flashing

Program can be flashed to EK-RA6M5 via the on-board SEGGER J-Link debugger. SEGGER J-link’s drivers are available at https://www.segger.com/downloads/jlink/

To flash the program to board

  1. Connect to J-Link OB via USB port to host PC

  2. Make sure J-Link OB jumper is in default configuration as describe in EK-RA6M5 - User’s Manual

  3. Execute west command to flash using jlink runner

    west flash -r jlink

  4. Or flash using rfp runner, this will partition memory then flash zephyr image.

    west flash -r rfp

Debugging

You can use Segger Ozone (Segger Ozone Download) for a visual debug interface

Once downloaded and installed, open Segger Ozone and configure the debug project like so:

  • Target Device: R7FA6M5BH

  • Target Interface: SWD

  • Target Interface Speed: 4 MHz

  • Host Interface: USB

  • Program File: <path/to/your/build/zephyr.elf>

Note: It’s verified that we can debug OK on Segger Ozone v3.30d so please use this or later version of Segger Ozone

References