Nucleo G491RE

Overview

The Nucleo G491RE board features an ARM® Cortex®-M4 based STM32G491RE MCU with a wide range of connectivity support and configurations. Here are some highlights of the Nucleo G491RE board:

  • STM32 microcontroller in LQFP64 package

  • Arduino® Uno V3 connectivity

  • On-board ST-LINK/V3E debugger/programmer with SWD connector

  • Flexible board power supply:

    • USB VBUS or external source (3.3 V, 5 V, 7-12 V)

    • Power management access point

  • Three LEDs: USB communication (LD1), power LED (LD3), user LED (LD2)

  • Two push-buttons: RESET and USER

More information about the board can be found at the Nucleo G491RE website.

Hardware

The STM32G491RE SoC provides the following hardware IPs:

  • Core: ARM® 32-bit Cortex®-M4 CPU with FPU, frequency up to 170 MHz

  • Clock Sources:

    • 4 to 48 MHz crystal oscillator

    • 32 kHz oscillator with calibration

    • Internal 16 MHz RC with PLL option (±1%)

    • Internal 32 kHz RC oscillator (±5%)

  • RTC with HW calendar, alarms and calibration

  • 15 timers:

    • 1 x 32-bit timer and 2 x 16-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input

    • 3 x 16-bit 8-channel advanced motor control timers, with up to 8 x PWM channels, dead time generation and emergency stop

    • 1 x 16-bit timer with 2 x IC/OCs, one OCN/PWM, dead time generation and emergency stop

    • 2 x 16-bit timers with IC/OC/OCN/PWM, dead time generation and emergency stop

    • 2 x watchdog timers (independent, window)

    • 1 x SysTick timer: 24-bit downcounter

    • 2 x 16-bit basic timers

    • 1 x low-power timer

  • Up to 86 fast I/Os, most 5 V-tolerant

  • Memories

    • Up to 512 KB single bank Flash, proprietary code readout protection

    • Up to 112 KB of SRAM including 32 KB with hardware parity check

  • Rich analog peripherals (independent supply)

    • 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling

    • 4x 12-bit DAC, low-power sample and hold

    • 4x operational amplifiers with built-in PGA

    • 4x ultra-fast rail-to-rail analog comparators

  • 18x communication interfaces

    • 2x FDCAN controller supporting flexible data rate

    • 3x I2C FM+ (1 Mbit/s), SMBus/PMBus

    • 5x USARTs (ISO 7816, LIN, IrDA, modem)

    • 1x LPUART

    • 3x SPIs (2x with multiplexed half duplex I2S interface)

    • 1x SAI (serial audio interface)

    • USB 2.0 full-speed interface with LPM and BCD support

    • IRTIM (Infrared interface)

    • USB Type-C® /USB power delivery controller (UCPD)

  • 16-channel DMA controller

  • True random number generator (RNG)

  • CRC calculation unit, 96-bit unique ID

  • Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™

More information about STM32G491RE can be found here:

Supported Features

The nucleo_g491re board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

Connections and IOs

Nucleo G491RE board has 6 GPIO controllers. These controllers are responsible for pin muxing, input/output, pull-up, etc.

For more details please refer to STM32G4 Nucleo-64 board User Manual.

Default Zephyr Peripheral Mapping:

  • UART_1_TX : PC4

  • UART_1_RX : PC5

  • LPUART_1_TX : PA2

  • LPUART_1_RX : PA3

  • I2C_1_SCL : PB8

  • I2C_1_SDA : PB9

  • SPI_1_NSS : PB6

  • SPI_1_SCK : PA5

  • SPI_1_MISO : PA6

  • SPI_1_MOSI : PA7

  • SPI_2_NSS : PB12

  • SPI_2_SCK : PB13

  • SPI_2_MISO : PB14

  • SPI_2_MOSI : PB15

  • SPI_3_NSS : PA15

  • SPI_3_SCK : PC10

  • SPI_3_MISO : PC11

  • SPI_3_MOSI : PC12

  • PWM_3_CH1 : PB4

  • USER_PB : PC13

  • LD2 : PA5

  • DAC1_OUT1 : PA4

System Clock

Nucleo G491RE System Clock could be driven by internal or external oscillator, as well as main PLL clock. By default System clock is driven by PLL clock at 150 MHz, driven by 16 MHz high speed internal oscillator. The clock can be boosted to 170 MHz if boost mode is selected.

Serial Port

Nucleo G491RE board has 5 U(S)ARTs and one LPUART. The Zephyr console output is assigned to LPUART1. Default settings are 115200 8N1.

Please note that LPUART1 baudrate is limited to 9600 if the MCU is clocked by LSE (32.768 kHz) in low power mode.

Programming and Debugging

The nucleo_g491re board supports the runners and associated west commands listed below.

flash debug

Nucleo G491RE board includes an ST-LINK/V3E embedded debug tool interface.

Applications for the nucleo_g491re board configuration can be built and flashed in the usual way (see Building an Application and Run an Application for more details).

Flashing

The board is configured to be flashed using west STM32CubeProgrammer runner, so its installation is required.

Alternatively, OpenOCD or pyOCD can also be used to flash the board using the --runner (or -r) option:

$ west flash --runner openocd
$ west flash --runner pyocd

pyOCD can be used after adding “pack” support with the following commands:

$ pyocd pack --update
$ pyocd pack --install stm32g491re

Flashing an application to Nucleo G491RE

Connect the Nucleo G491RE to your host computer using the USB port, then run a serial host program to connect with your Nucleo board.

$ minicom -D /dev/ttyACM0

Now build and flash an application. Here is an example for Hello World.

# From the root of the zephyr repository
west build -b nucleo_g491re samples/hello_world
west flash

You should see the following message on the console:

$ Hello World! arm

Debugging

You can debug an application in the usual way. Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b nucleo_g491re samples/hello_world
west debug